1/*
2 * RISC-V Emulation Helpers for QEMU.
3 *
4 * Copyright (c) 2016-2017 Sagar Karandikar, sagark@eecs.berkeley.edu
5 * Copyright (c) 2017-2018 SiFive, Inc.
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms and conditions of the GNU General Public License,
9 * version 2 or later, as published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * more details.
15 *
16 * You should have received a copy of the GNU General Public License along with
17 * this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
20#include "qemu/osdep.h"
21#include "qemu/log.h"
22#include "cpu.h"
23#include "qemu/main-loop.h"
24#include "exec/exec-all.h"
25#include "exec/helper-proto.h"
26
27/* Exceptions processing helpers */
28void QEMU_NORETURN riscv_raise_exception(CPURISCVState *env,
29 uint32_t exception, uintptr_t pc)
30{
31 CPUState *cs = env_cpu(env);
32 qemu_log_mask(CPU_LOG_INT, "%s: %d\n", __func__, exception);
33 cs->exception_index = exception;
34 cpu_loop_exit_restore(cs, pc);
35}
36
37void helper_raise_exception(CPURISCVState *env, uint32_t exception)
38{
39 riscv_raise_exception(env, exception, 0);
40}
41
42target_ulong helper_csrrw(CPURISCVState *env, target_ulong src,
43 target_ulong csr)
44{
45 target_ulong val = 0;
46 if (riscv_csrrw(env, csr, &val, src, -1) < 0) {
47 riscv_raise_exception(env, RISCV_EXCP_ILLEGAL_INST, GETPC());
48 }
49 return val;
50}
51
52target_ulong helper_csrrs(CPURISCVState *env, target_ulong src,
53 target_ulong csr, target_ulong rs1_pass)
54{
55 target_ulong val = 0;
56 if (riscv_csrrw(env, csr, &val, -1, rs1_pass ? src : 0) < 0) {
57 riscv_raise_exception(env, RISCV_EXCP_ILLEGAL_INST, GETPC());
58 }
59 return val;
60}
61
62target_ulong helper_csrrc(CPURISCVState *env, target_ulong src,
63 target_ulong csr, target_ulong rs1_pass)
64{
65 target_ulong val = 0;
66 if (riscv_csrrw(env, csr, &val, 0, rs1_pass ? src : 0) < 0) {
67 riscv_raise_exception(env, RISCV_EXCP_ILLEGAL_INST, GETPC());
68 }
69 return val;
70}
71
72#ifndef CONFIG_USER_ONLY
73
74target_ulong helper_sret(CPURISCVState *env, target_ulong cpu_pc_deb)
75{
76 if (!(env->priv >= PRV_S)) {
77 riscv_raise_exception(env, RISCV_EXCP_ILLEGAL_INST, GETPC());
78 }
79
80 target_ulong retpc = env->sepc;
81 if (!riscv_has_ext(env, RVC) && (retpc & 0x3)) {
82 riscv_raise_exception(env, RISCV_EXCP_INST_ADDR_MIS, GETPC());
83 }
84
85 if (env->priv_ver >= PRIV_VERSION_1_10_0 &&
86 get_field(env->mstatus, MSTATUS_TSR)) {
87 riscv_raise_exception(env, RISCV_EXCP_ILLEGAL_INST, GETPC());
88 }
89
90 target_ulong mstatus = env->mstatus;
91 target_ulong prev_priv = get_field(mstatus, MSTATUS_SPP);
92 mstatus = set_field(mstatus,
93 env->priv_ver >= PRIV_VERSION_1_10_0 ?
94 MSTATUS_SIE : MSTATUS_UIE << prev_priv,
95 get_field(mstatus, MSTATUS_SPIE));
96 mstatus = set_field(mstatus, MSTATUS_SPIE, 0);
97 mstatus = set_field(mstatus, MSTATUS_SPP, PRV_U);
98 riscv_cpu_set_mode(env, prev_priv);
99 env->mstatus = mstatus;
100
101 return retpc;
102}
103
104target_ulong helper_mret(CPURISCVState *env, target_ulong cpu_pc_deb)
105{
106 if (!(env->priv >= PRV_M)) {
107 riscv_raise_exception(env, RISCV_EXCP_ILLEGAL_INST, GETPC());
108 }
109
110 target_ulong retpc = env->mepc;
111 if (!riscv_has_ext(env, RVC) && (retpc & 0x3)) {
112 riscv_raise_exception(env, RISCV_EXCP_INST_ADDR_MIS, GETPC());
113 }
114
115 target_ulong mstatus = env->mstatus;
116 target_ulong prev_priv = get_field(mstatus, MSTATUS_MPP);
117 mstatus = set_field(mstatus,
118 env->priv_ver >= PRIV_VERSION_1_10_0 ?
119 MSTATUS_MIE : MSTATUS_UIE << prev_priv,
120 get_field(mstatus, MSTATUS_MPIE));
121 mstatus = set_field(mstatus, MSTATUS_MPIE, 0);
122 mstatus = set_field(mstatus, MSTATUS_MPP, PRV_U);
123 riscv_cpu_set_mode(env, prev_priv);
124 env->mstatus = mstatus;
125
126 return retpc;
127}
128
129void helper_wfi(CPURISCVState *env)
130{
131 CPUState *cs = env_cpu(env);
132
133 if (env->priv == PRV_S &&
134 env->priv_ver >= PRIV_VERSION_1_10_0 &&
135 get_field(env->mstatus, MSTATUS_TW)) {
136 riscv_raise_exception(env, RISCV_EXCP_ILLEGAL_INST, GETPC());
137 } else {
138 cs->halted = 1;
139 cs->exception_index = EXCP_HLT;
140 cpu_loop_exit(cs);
141 }
142}
143
144void helper_tlb_flush(CPURISCVState *env)
145{
146 CPUState *cs = env_cpu(env);
147 if (!(env->priv >= PRV_S) ||
148 (env->priv == PRV_S &&
149 env->priv_ver >= PRIV_VERSION_1_10_0 &&
150 get_field(env->mstatus, MSTATUS_TVM))) {
151 riscv_raise_exception(env, RISCV_EXCP_ILLEGAL_INST, GETPC());
152 } else {
153 tlb_flush(cs);
154 }
155}
156
157#endif /* !CONFIG_USER_ONLY */
158