1 | #line 1 "ad_x86_peephole.cpp" |
2 | // |
3 | // Copyright (c) 2003, 2019, Oracle and/or its affiliates. All rights reserved. |
4 | // DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
5 | // |
6 | // This code is free software; you can redistribute it and/or modify it |
7 | // under the terms of the GNU General Public License version 2 only, as |
8 | // published by the Free Software Foundation. |
9 | // |
10 | // This code is distributed in the hope that it will be useful, but WITHOUT |
11 | // ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
12 | // FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
13 | // version 2 for more details (a copy is included in the LICENSE file that |
14 | // accompanied this code). |
15 | // |
16 | // You should have received a copy of the GNU General Public License version |
17 | // 2 along with this work; if not, write to the Free Software Foundation, |
18 | // Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. |
19 | // |
20 | // Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
21 | // or visit www.oracle.com if you need additional information or have any |
22 | // questions. |
23 | // |
24 | // |
25 | |
26 | // Machine Generated File. Do Not Edit! |
27 | |
28 | #include "precompiled.hpp" |
29 | #include "adfiles/ad_x86.hpp" |
30 | MachNode *loadINode::peephole(Block *block, int block_index, PhaseRegAlloc *ra_, int &deleted) { |
31 | bool matches = true; |
32 | MachNode *inst0 = this; |
33 | MachNode *inst1 = NULL; |
34 | if( (OptoPeepholeAt == -1) || (OptoPeepholeAt==0) ) { |
35 | matches = true; |
36 | // Check instruction sub-tree |
37 | // Identify previous instruction if inside this block |
38 | if( block_index - 1 > 0 ) { |
39 | Node *n = block->get_node(block_index - 1); |
40 | inst1 = (n->is_Mach()) ? n->as_Mach() : NULL; |
41 | } |
42 | matches = matches && (inst1 != NULL) && (inst1->rule() == storeI_rule); |
43 | // If instruction subtree matches |
44 | if( matches ) { |
45 | |
46 | // Check constraints on sub-tree-leaves |
47 | // Build map to register info |
48 | // Start at oper_input_base() and count operands |
49 | unsigned inst0_idx0 = 2; |
50 | unsigned inst0_idx1 = 2; // mem |
51 | unsigned inst0_idx2 = inst0->req(); |
52 | // Start at oper_input_base() and count operands |
53 | unsigned inst1_idx0 = 2; |
54 | unsigned inst1_idx1 = 2; // mem |
55 | unsigned inst1_idx2 = inst1_idx1 + inst1->_opnds[1]->num_edges(); // src |
56 | unsigned inst1_idx3 = inst1->req(); |
57 | matches = matches && |
58 | (inst1->_opnds[2]->reg(ra_,inst1,inst1_idx2) /* 1.src */ == /* 0.dst */ inst0->_opnds[0]->reg(ra_,inst0)) |
59 | && ( |
60 | (inst1->_opnds[1]->base(ra_,inst1,inst1_idx1) /* 1.mem$$base */ == /* 0.mem$$base */ inst0->_opnds[1]->base(ra_,inst0,inst0_idx1)) && |
61 | (inst1->_opnds[1]->index(ra_,inst1,inst1_idx1) /* 1.mem$$index */ == /* 0.mem$$index */ inst0->_opnds[1]->index(ra_,inst0,inst0_idx1)) && |
62 | (inst1->_opnds[1]->scale() /* 1.mem$$scale */ == /* 0.mem$$scale */ inst0->_opnds[1]->scale()) && |
63 | (inst1->_opnds[1]->disp(ra_,inst1,inst1_idx1) /* 1.mem$$disp */ == /* 0.mem$$disp */ inst0->_opnds[1]->disp(ra_,inst0,inst0_idx1)) |
64 | ) |
65 | ; |
66 | // IF instructions and constraints matched |
67 | if( matches ) { |
68 | // generate the new sub-tree |
69 | assert( true, "Debug stopping point" ); |
70 | storeINode *root = new storeINode(); |
71 | // ----- Initial setup ----- |
72 | root->add_req(_in[0]); // control edge |
73 | root->add_req(inst1->in(1)); // unmatched ideal edge |
74 | root->_bottom_type = inst1->bottom_type(); |
75 | ra_->add_reference(root, inst1); |
76 | ra_->set_oop (root, ra_->is_oop(inst1)); |
77 | ra_->set_pair(root->_idx, ra_->get_reg_second(inst1), ra_->get_reg_first(inst1)); |
78 | root->_opnds[0] = inst1->_opnds[0]->clone(); // result |
79 | // ----- Done with initial setup ----- |
80 | for( unsigned x1 = inst1_idx1; x1 < inst1_idx2; x1++ ) |
81 | root->add_req( inst1->in(x1) ); |
82 | root->_opnds[1] = inst1->_opnds[1]->clone(); |
83 | for( unsigned x2 = inst1_idx2; x2 < inst1_idx3; x2++ ) |
84 | root->add_req( inst1->in(x2) ); |
85 | root->_opnds[2] = inst1->_opnds[2]->clone(); |
86 | deleted = 2; |
87 | return root; // return new root; |
88 | } |
89 | } |
90 | } // end of peephole rule #0 |
91 | |
92 | return NULL; // No peephole rules matched |
93 | } |
94 | |
95 | MachNode *loadLNode::peephole(Block *block, int block_index, PhaseRegAlloc *ra_, int &deleted) { |
96 | bool matches = true; |
97 | MachNode *inst0 = this; |
98 | MachNode *inst1 = NULL; |
99 | if( (OptoPeepholeAt == -1) || (OptoPeepholeAt==1) ) { |
100 | matches = true; |
101 | // Check instruction sub-tree |
102 | // Identify previous instruction if inside this block |
103 | if( block_index - 1 > 0 ) { |
104 | Node *n = block->get_node(block_index - 1); |
105 | inst1 = (n->is_Mach()) ? n->as_Mach() : NULL; |
106 | } |
107 | matches = matches && (inst1 != NULL) && (inst1->rule() == storeL_rule); |
108 | // If instruction subtree matches |
109 | if( matches ) { |
110 | |
111 | // Check constraints on sub-tree-leaves |
112 | // Build map to register info |
113 | // Start at oper_input_base() and count operands |
114 | unsigned inst0_idx0 = 2; |
115 | unsigned inst0_idx1 = 2; // mem |
116 | unsigned inst0_idx2 = inst0->req(); |
117 | // Start at oper_input_base() and count operands |
118 | unsigned inst1_idx0 = 2; |
119 | unsigned inst1_idx1 = 2; // mem |
120 | unsigned inst1_idx2 = inst1_idx1 + inst1->_opnds[1]->num_edges(); // src |
121 | unsigned inst1_idx3 = inst1->req(); |
122 | matches = matches && |
123 | (inst1->_opnds[2]->reg(ra_,inst1,inst1_idx2) /* 1.src */ == /* 0.dst */ inst0->_opnds[0]->reg(ra_,inst0)) |
124 | && ( |
125 | (inst1->_opnds[1]->base(ra_,inst1,inst1_idx1) /* 1.mem$$base */ == /* 0.mem$$base */ inst0->_opnds[1]->base(ra_,inst0,inst0_idx1)) && |
126 | (inst1->_opnds[1]->index(ra_,inst1,inst1_idx1) /* 1.mem$$index */ == /* 0.mem$$index */ inst0->_opnds[1]->index(ra_,inst0,inst0_idx1)) && |
127 | (inst1->_opnds[1]->scale() /* 1.mem$$scale */ == /* 0.mem$$scale */ inst0->_opnds[1]->scale()) && |
128 | (inst1->_opnds[1]->disp(ra_,inst1,inst1_idx1) /* 1.mem$$disp */ == /* 0.mem$$disp */ inst0->_opnds[1]->disp(ra_,inst0,inst0_idx1)) |
129 | ) |
130 | ; |
131 | // IF instructions and constraints matched |
132 | if( matches ) { |
133 | // generate the new sub-tree |
134 | assert( true, "Debug stopping point" ); |
135 | storeLNode *root = new storeLNode(); |
136 | // ----- Initial setup ----- |
137 | root->add_req(_in[0]); // control edge |
138 | root->add_req(inst1->in(1)); // unmatched ideal edge |
139 | root->_bottom_type = inst1->bottom_type(); |
140 | ra_->add_reference(root, inst1); |
141 | ra_->set_oop (root, ra_->is_oop(inst1)); |
142 | ra_->set_pair(root->_idx, ra_->get_reg_second(inst1), ra_->get_reg_first(inst1)); |
143 | root->_opnds[0] = inst1->_opnds[0]->clone(); // result |
144 | // ----- Done with initial setup ----- |
145 | for( unsigned x1 = inst1_idx1; x1 < inst1_idx2; x1++ ) |
146 | root->add_req( inst1->in(x1) ); |
147 | root->_opnds[1] = inst1->_opnds[1]->clone(); |
148 | for( unsigned x2 = inst1_idx2; x2 < inst1_idx3; x2++ ) |
149 | root->add_req( inst1->in(x2) ); |
150 | root->_opnds[2] = inst1->_opnds[2]->clone(); |
151 | deleted = 2; |
152 | return root; // return new root; |
153 | } |
154 | } |
155 | } // end of peephole rule #1 |
156 | |
157 | return NULL; // No peephole rules matched |
158 | } |
159 | |
160 | // Check consistency of C++ compilation with ADLC options: |
161 | // Check adlc -DLINUX=1 |
162 | #ifndef LINUX |
163 | # error "LINUX must be defined" |
164 | #endif // LINUX |
165 | // Check adlc -D_GNU_SOURCE=1 |
166 | #ifndef _GNU_SOURCE |
167 | # error "_GNU_SOURCE must be defined" |
168 | #endif // _GNU_SOURCE |
169 | // Check adlc -DAMD64=1 |
170 | #ifndef AMD64 |
171 | # error "AMD64 must be defined" |
172 | #endif // AMD64 |
173 | // Check adlc -D_LP64=1 |
174 | #ifndef _LP64 |
175 | # error "_LP64 must be defined" |
176 | #endif // _LP64 |
177 | |