1 | /* |
2 | * QEMU fulong 2e mini pc support |
3 | * |
4 | * Copyright (c) 2008 yajin (yajin@vm-kernel.org) |
5 | * Copyright (c) 2009 chenming (chenming@rdc.faw.com.cn) |
6 | * Copyright (c) 2010 Huacai Chen (zltjiangshi@gmail.com) |
7 | * This code is licensed under the GNU GPL v2. |
8 | * |
9 | * Contributions after 2012-01-13 are licensed under the terms of the |
10 | * GNU GPL, version 2 or (at your option) any later version. |
11 | */ |
12 | |
13 | /* |
14 | * Fulong 2e mini pc is based on ICT/ST Loongson 2e CPU (MIPS III like, 800MHz) |
15 | * http://www.linux-mips.org/wiki/Fulong |
16 | * |
17 | * Loongson 2e user manual: |
18 | * http://www.loongsondeveloper.com/doc/Loongson2EUserGuide.pdf |
19 | */ |
20 | |
21 | #include "qemu/osdep.h" |
22 | #include "qemu-common.h" |
23 | #include "qemu/units.h" |
24 | #include "qapi/error.h" |
25 | #include "cpu.h" |
26 | #include "hw/i386/pc.h" |
27 | #include "hw/dma/i8257.h" |
28 | #include "hw/isa/superio.h" |
29 | #include "net/net.h" |
30 | #include "hw/boards.h" |
31 | #include "hw/i2c/smbus_eeprom.h" |
32 | #include "hw/block/flash.h" |
33 | #include "hw/mips/mips.h" |
34 | #include "hw/mips/cpudevs.h" |
35 | #include "hw/pci/pci.h" |
36 | #include "audio/audio.h" |
37 | #include "qemu/log.h" |
38 | #include "hw/loader.h" |
39 | #include "hw/ide.h" |
40 | #include "elf.h" |
41 | #include "hw/isa/vt82c686.h" |
42 | #include "hw/timer/mc146818rtc.h" |
43 | #include "hw/timer/i8254.h" |
44 | #include "exec/address-spaces.h" |
45 | #include "sysemu/qtest.h" |
46 | #include "sysemu/reset.h" |
47 | #include "qemu/error-report.h" |
48 | |
49 | #define DEBUG_FULONG2E_INIT |
50 | |
51 | #define ENVP_ADDR 0x80002000l |
52 | #define ENVP_NB_ENTRIES 16 |
53 | #define ENVP_ENTRY_SIZE 256 |
54 | |
55 | /* fulong 2e has a 512k flash: Winbond W39L040AP70Z */ |
56 | #define BIOS_SIZE (512 * KiB) |
57 | #define MAX_IDE_BUS 2 |
58 | |
59 | /* |
60 | * PMON is not part of qemu and released with BSD license, anyone |
61 | * who want to build a pmon binary please first git-clone the source |
62 | * from the git repository at: |
63 | * http://www.loongson.cn/support/git/pmon |
64 | * Then follow the "Compile Guide" available at: |
65 | * http://dev.lemote.com/code/pmon |
66 | * |
67 | * Notes: |
68 | * 1, don't use the source at http://dev.lemote.com/http_git/pmon.git |
69 | * 2, use "Bonito2edev" to replace "dir_corresponding_to_your_target_hardware" |
70 | * in the "Compile Guide". |
71 | */ |
72 | #define FULONG_BIOSNAME "pmon_fulong2e.bin" |
73 | |
74 | /* PCI SLOT in fulong 2e */ |
75 | #define FULONG2E_VIA_SLOT 5 |
76 | #define FULONG2E_ATI_SLOT 6 |
77 | #define FULONG2E_RTL8139_SLOT 7 |
78 | |
79 | static struct _loaderparams { |
80 | int ram_size; |
81 | const char *kernel_filename; |
82 | const char *kernel_cmdline; |
83 | const char *initrd_filename; |
84 | } loaderparams; |
85 | |
86 | static void GCC_FMT_ATTR(3, 4) prom_set(uint32_t *prom_buf, int index, |
87 | const char *string, ...) |
88 | { |
89 | va_list ap; |
90 | int32_t table_addr; |
91 | |
92 | if (index >= ENVP_NB_ENTRIES) { |
93 | return; |
94 | } |
95 | |
96 | if (string == NULL) { |
97 | prom_buf[index] = 0; |
98 | return; |
99 | } |
100 | |
101 | table_addr = sizeof(int32_t) * ENVP_NB_ENTRIES + index * ENVP_ENTRY_SIZE; |
102 | prom_buf[index] = tswap32(ENVP_ADDR + table_addr); |
103 | |
104 | va_start(ap, string); |
105 | vsnprintf((char *)prom_buf + table_addr, ENVP_ENTRY_SIZE, string, ap); |
106 | va_end(ap); |
107 | } |
108 | |
109 | static int64_t load_kernel(CPUMIPSState *env) |
110 | { |
111 | int64_t kernel_entry, kernel_low, kernel_high, initrd_size; |
112 | int index = 0; |
113 | long kernel_size; |
114 | ram_addr_t initrd_offset; |
115 | uint32_t *prom_buf; |
116 | long prom_size; |
117 | |
118 | kernel_size = load_elf(loaderparams.kernel_filename, NULL, |
119 | cpu_mips_kseg0_to_phys, NULL, |
120 | (uint64_t *)&kernel_entry, |
121 | (uint64_t *)&kernel_low, (uint64_t *)&kernel_high, |
122 | 0, EM_MIPS, 1, 0); |
123 | if (kernel_size < 0) { |
124 | error_report("could not load kernel '%s': %s" , |
125 | loaderparams.kernel_filename, |
126 | load_elf_strerror(kernel_size)); |
127 | exit(1); |
128 | } |
129 | |
130 | /* load initrd */ |
131 | initrd_size = 0; |
132 | initrd_offset = 0; |
133 | if (loaderparams.initrd_filename) { |
134 | initrd_size = get_image_size(loaderparams.initrd_filename); |
135 | if (initrd_size > 0) { |
136 | initrd_offset = (kernel_high + ~INITRD_PAGE_MASK) & |
137 | INITRD_PAGE_MASK; |
138 | if (initrd_offset + initrd_size > ram_size) { |
139 | error_report("memory too small for initial ram disk '%s'" , |
140 | loaderparams.initrd_filename); |
141 | exit(1); |
142 | } |
143 | initrd_size = load_image_targphys(loaderparams.initrd_filename, |
144 | initrd_offset, |
145 | ram_size - initrd_offset); |
146 | } |
147 | if (initrd_size == (target_ulong) -1) { |
148 | error_report("could not load initial ram disk '%s'" , |
149 | loaderparams.initrd_filename); |
150 | exit(1); |
151 | } |
152 | } |
153 | |
154 | /* Setup prom parameters. */ |
155 | prom_size = ENVP_NB_ENTRIES * (sizeof(int32_t) + ENVP_ENTRY_SIZE); |
156 | prom_buf = g_malloc(prom_size); |
157 | |
158 | prom_set(prom_buf, index++, "%s" , loaderparams.kernel_filename); |
159 | if (initrd_size > 0) { |
160 | prom_set(prom_buf, index++, |
161 | "rd_start=0x%" PRIx64 " rd_size=%" PRId64 " %s" , |
162 | cpu_mips_phys_to_kseg0(NULL, initrd_offset), |
163 | initrd_size, loaderparams.kernel_cmdline); |
164 | } else { |
165 | prom_set(prom_buf, index++, "%s" , loaderparams.kernel_cmdline); |
166 | } |
167 | |
168 | /* Setup minimum environment variables */ |
169 | prom_set(prom_buf, index++, "busclock=33000000" ); |
170 | prom_set(prom_buf, index++, "cpuclock=100000000" ); |
171 | prom_set(prom_buf, index++, "memsize=%" PRIi64, loaderparams.ram_size / MiB); |
172 | prom_set(prom_buf, index++, "modetty0=38400n8r" ); |
173 | prom_set(prom_buf, index++, NULL); |
174 | |
175 | rom_add_blob_fixed("prom" , prom_buf, prom_size, |
176 | cpu_mips_kseg0_to_phys(NULL, ENVP_ADDR)); |
177 | |
178 | g_free(prom_buf); |
179 | return kernel_entry; |
180 | } |
181 | |
182 | static void write_bootloader(CPUMIPSState *env, uint8_t *base, |
183 | int64_t kernel_addr) |
184 | { |
185 | uint32_t *p; |
186 | |
187 | /* Small bootloader */ |
188 | p = (uint32_t *)base; |
189 | |
190 | /* j 0x1fc00040 */ |
191 | stl_p(p++, 0x0bf00010); |
192 | /* nop */ |
193 | stl_p(p++, 0x00000000); |
194 | |
195 | /* Second part of the bootloader */ |
196 | p = (uint32_t *)(base + 0x040); |
197 | |
198 | /* lui a0, 0 */ |
199 | stl_p(p++, 0x3c040000); |
200 | /* ori a0, a0, 2 */ |
201 | stl_p(p++, 0x34840002); |
202 | /* lui a1, high(ENVP_ADDR) */ |
203 | stl_p(p++, 0x3c050000 | ((ENVP_ADDR >> 16) & 0xffff)); |
204 | /* ori a1, a0, low(ENVP_ADDR) */ |
205 | stl_p(p++, 0x34a50000 | (ENVP_ADDR & 0xffff)); |
206 | /* lui a2, high(ENVP_ADDR + 8) */ |
207 | stl_p(p++, 0x3c060000 | (((ENVP_ADDR + 8) >> 16) & 0xffff)); |
208 | /* ori a2, a2, low(ENVP_ADDR + 8) */ |
209 | stl_p(p++, 0x34c60000 | ((ENVP_ADDR + 8) & 0xffff)); |
210 | /* lui a3, high(env->ram_size) */ |
211 | stl_p(p++, 0x3c070000 | (loaderparams.ram_size >> 16)); |
212 | /* ori a3, a3, low(env->ram_size) */ |
213 | stl_p(p++, 0x34e70000 | (loaderparams.ram_size & 0xffff)); |
214 | /* lui ra, high(kernel_addr) */ |
215 | stl_p(p++, 0x3c1f0000 | ((kernel_addr >> 16) & 0xffff)); |
216 | /* ori ra, ra, low(kernel_addr) */ |
217 | stl_p(p++, 0x37ff0000 | (kernel_addr & 0xffff)); |
218 | /* jr ra */ |
219 | stl_p(p++, 0x03e00008); |
220 | /* nop */ |
221 | stl_p(p++, 0x00000000); |
222 | } |
223 | |
224 | static void main_cpu_reset(void *opaque) |
225 | { |
226 | MIPSCPU *cpu = opaque; |
227 | CPUMIPSState *env = &cpu->env; |
228 | |
229 | cpu_reset(CPU(cpu)); |
230 | /* TODO: 2E reset stuff */ |
231 | if (loaderparams.kernel_filename) { |
232 | env->CP0_Status &= ~((1 << CP0St_BEV) | (1 << CP0St_ERL)); |
233 | } |
234 | } |
235 | |
236 | static void vt82c686b_southbridge_init(PCIBus *pci_bus, int slot, qemu_irq intc, |
237 | I2CBus **i2c_bus, ISABus **p_isa_bus) |
238 | { |
239 | qemu_irq *i8259; |
240 | ISABus *isa_bus; |
241 | DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS]; |
242 | |
243 | isa_bus = vt82c686b_isa_init(pci_bus, PCI_DEVFN(slot, 0)); |
244 | if (!isa_bus) { |
245 | fprintf(stderr, "vt82c686b_init error\n" ); |
246 | exit(1); |
247 | } |
248 | *p_isa_bus = isa_bus; |
249 | /* Interrupt controller */ |
250 | /* The 8259 -> IP5 */ |
251 | i8259 = i8259_init(isa_bus, intc); |
252 | isa_bus_irqs(isa_bus, i8259); |
253 | /* init other devices */ |
254 | i8254_pit_init(isa_bus, 0x40, 0, NULL); |
255 | i8257_dma_init(isa_bus, 0); |
256 | /* Super I/O */ |
257 | isa_create_simple(isa_bus, TYPE_VT82C686B_SUPERIO); |
258 | |
259 | ide_drive_get(hd, ARRAY_SIZE(hd)); |
260 | via_ide_init(pci_bus, hd, PCI_DEVFN(slot, 1)); |
261 | |
262 | pci_create_simple(pci_bus, PCI_DEVFN(slot, 2), "vt82c686b-usb-uhci" ); |
263 | pci_create_simple(pci_bus, PCI_DEVFN(slot, 3), "vt82c686b-usb-uhci" ); |
264 | |
265 | *i2c_bus = vt82c686b_pm_init(pci_bus, PCI_DEVFN(slot, 4), 0xeee1, NULL); |
266 | |
267 | /* Audio support */ |
268 | vt82c686b_ac97_init(pci_bus, PCI_DEVFN(slot, 5)); |
269 | vt82c686b_mc97_init(pci_bus, PCI_DEVFN(slot, 6)); |
270 | } |
271 | |
272 | /* Network support */ |
273 | static void network_init(PCIBus *pci_bus) |
274 | { |
275 | int i; |
276 | |
277 | for (i = 0; i < nb_nics; i++) { |
278 | NICInfo *nd = &nd_table[i]; |
279 | const char *default_devaddr = NULL; |
280 | |
281 | if (i == 0 && (!nd->model || strcmp(nd->model, "rtl8139" ) == 0)) { |
282 | /* The fulong board has a RTL8139 card using PCI SLOT 7 */ |
283 | default_devaddr = "07" ; |
284 | } |
285 | |
286 | pci_nic_init_nofail(nd, pci_bus, "rtl8139" , default_devaddr); |
287 | } |
288 | } |
289 | |
290 | static void mips_fulong2e_init(MachineState *machine) |
291 | { |
292 | const char *kernel_filename = machine->kernel_filename; |
293 | const char *kernel_cmdline = machine->kernel_cmdline; |
294 | const char *initrd_filename = machine->initrd_filename; |
295 | char *filename; |
296 | MemoryRegion *address_space_mem = get_system_memory(); |
297 | MemoryRegion *ram = g_new(MemoryRegion, 1); |
298 | MemoryRegion *bios = g_new(MemoryRegion, 1); |
299 | ram_addr_t ram_size = machine->ram_size; |
300 | long bios_size; |
301 | uint8_t *spd_data; |
302 | Error *err = NULL; |
303 | int64_t kernel_entry; |
304 | PCIBus *pci_bus; |
305 | ISABus *isa_bus; |
306 | I2CBus *smbus; |
307 | MIPSCPU *cpu; |
308 | CPUMIPSState *env; |
309 | DeviceState *dev; |
310 | |
311 | /* init CPUs */ |
312 | cpu = MIPS_CPU(cpu_create(machine->cpu_type)); |
313 | env = &cpu->env; |
314 | |
315 | qemu_register_reset(main_cpu_reset, cpu); |
316 | |
317 | /* TODO: support more than 256M RAM as highmem */ |
318 | ram_size = 256 * MiB; |
319 | |
320 | /* allocate RAM */ |
321 | memory_region_allocate_system_memory(ram, NULL, "fulong2e.ram" , ram_size); |
322 | memory_region_init_ram(bios, NULL, "fulong2e.bios" , BIOS_SIZE, |
323 | &error_fatal); |
324 | memory_region_set_readonly(bios, true); |
325 | |
326 | memory_region_add_subregion(address_space_mem, 0, ram); |
327 | memory_region_add_subregion(address_space_mem, 0x1fc00000LL, bios); |
328 | |
329 | /* |
330 | * We do not support flash operation, just loading pmon.bin as raw BIOS. |
331 | * Please use -L to set the BIOS path and -bios to set bios name. |
332 | */ |
333 | |
334 | if (kernel_filename) { |
335 | loaderparams.ram_size = ram_size; |
336 | loaderparams.kernel_filename = kernel_filename; |
337 | loaderparams.kernel_cmdline = kernel_cmdline; |
338 | loaderparams.initrd_filename = initrd_filename; |
339 | kernel_entry = load_kernel(env); |
340 | write_bootloader(env, memory_region_get_ram_ptr(bios), kernel_entry); |
341 | } else { |
342 | if (bios_name == NULL) { |
343 | bios_name = FULONG_BIOSNAME; |
344 | } |
345 | filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name); |
346 | if (filename) { |
347 | bios_size = load_image_targphys(filename, 0x1fc00000LL, |
348 | BIOS_SIZE); |
349 | g_free(filename); |
350 | } else { |
351 | bios_size = -1; |
352 | } |
353 | |
354 | if ((bios_size < 0 || bios_size > BIOS_SIZE) && |
355 | !kernel_filename && !qtest_enabled()) { |
356 | error_report("Could not load MIPS bios '%s'" , bios_name); |
357 | exit(1); |
358 | } |
359 | } |
360 | |
361 | /* Init internal devices */ |
362 | cpu_mips_irq_init_cpu(cpu); |
363 | cpu_mips_clock_init(cpu); |
364 | |
365 | /* North bridge, Bonito --> IP2 */ |
366 | pci_bus = bonito_init((qemu_irq *)&(env->irq[2])); |
367 | |
368 | /* South bridge -> IP5 */ |
369 | vt82c686b_southbridge_init(pci_bus, FULONG2E_VIA_SLOT, env->irq[5], |
370 | &smbus, &isa_bus); |
371 | |
372 | /* GPU */ |
373 | if (vga_interface_type != VGA_NONE) { |
374 | dev = DEVICE(pci_create(pci_bus, -1, "ati-vga" )); |
375 | qdev_prop_set_uint32(dev, "vgamem_mb" , 16); |
376 | qdev_prop_set_uint16(dev, "x-device-id" , 0x5159); |
377 | qdev_init_nofail(dev); |
378 | } |
379 | |
380 | /* Populate SPD eeprom data */ |
381 | spd_data = spd_data_generate(DDR, ram_size, &err); |
382 | if (err) { |
383 | warn_report_err(err); |
384 | } |
385 | if (spd_data) { |
386 | smbus_eeprom_init_one(smbus, 0x50, spd_data); |
387 | } |
388 | |
389 | mc146818_rtc_init(isa_bus, 2000, NULL); |
390 | |
391 | /* Network card: RTL8139D */ |
392 | network_init(pci_bus); |
393 | } |
394 | |
395 | static void mips_fulong2e_machine_init(MachineClass *mc) |
396 | { |
397 | mc->desc = "Fulong 2e mini pc" ; |
398 | mc->init = mips_fulong2e_init; |
399 | mc->block_default_type = IF_IDE; |
400 | mc->default_cpu_type = MIPS_CPU_TYPE_NAME("Loongson-2E" ); |
401 | mc->default_ram_size = 256 * MiB; |
402 | } |
403 | |
404 | DEFINE_MACHINE("fulong2e" , mips_fulong2e_machine_init) |
405 | |