1 | /* |
2 | * QEMU/mipssim emulation |
3 | * |
4 | * Emulates a very simple machine model similar to the one used by the |
5 | * proprietary MIPS emulator. |
6 | * |
7 | * Copyright (c) 2007 Thiemo Seufer |
8 | * |
9 | * Permission is hereby granted, free of charge, to any person obtaining a copy |
10 | * of this software and associated documentation files (the "Software"), to deal |
11 | * in the Software without restriction, including without limitation the rights |
12 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell |
13 | * copies of the Software, and to permit persons to whom the Software is |
14 | * furnished to do so, subject to the following conditions: |
15 | * |
16 | * The above copyright notice and this permission notice shall be included in |
17 | * all copies or substantial portions of the Software. |
18 | * |
19 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
20 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
21 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
22 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
23 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, |
24 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN |
25 | * THE SOFTWARE. |
26 | */ |
27 | |
28 | #include "qemu/osdep.h" |
29 | #include "qapi/error.h" |
30 | #include "qemu-common.h" |
31 | #include "cpu.h" |
32 | #include "hw/mips/mips.h" |
33 | #include "hw/mips/cpudevs.h" |
34 | #include "hw/char/serial.h" |
35 | #include "hw/isa/isa.h" |
36 | #include "net/net.h" |
37 | #include "sysemu/sysemu.h" |
38 | #include "hw/boards.h" |
39 | #include "hw/mips/bios.h" |
40 | #include "hw/loader.h" |
41 | #include "elf.h" |
42 | #include "hw/sysbus.h" |
43 | #include "exec/address-spaces.h" |
44 | #include "qemu/error-report.h" |
45 | #include "sysemu/qtest.h" |
46 | #include "sysemu/reset.h" |
47 | |
48 | static struct _loaderparams { |
49 | int ram_size; |
50 | const char *kernel_filename; |
51 | const char *kernel_cmdline; |
52 | const char *initrd_filename; |
53 | } loaderparams; |
54 | |
55 | typedef struct ResetData { |
56 | MIPSCPU *cpu; |
57 | uint64_t vector; |
58 | } ResetData; |
59 | |
60 | static int64_t load_kernel(void) |
61 | { |
62 | int64_t entry, kernel_high, initrd_size; |
63 | long kernel_size; |
64 | ram_addr_t initrd_offset; |
65 | int big_endian; |
66 | |
67 | #ifdef TARGET_WORDS_BIGENDIAN |
68 | big_endian = 1; |
69 | #else |
70 | big_endian = 0; |
71 | #endif |
72 | |
73 | kernel_size = load_elf(loaderparams.kernel_filename, NULL, |
74 | cpu_mips_kseg0_to_phys, NULL, |
75 | (uint64_t *)&entry, NULL, |
76 | (uint64_t *)&kernel_high, big_endian, |
77 | EM_MIPS, 1, 0); |
78 | if (kernel_size >= 0) { |
79 | if ((entry & ~0x7fffffffULL) == 0x80000000) { |
80 | entry = (int32_t)entry; |
81 | } |
82 | } else { |
83 | error_report("could not load kernel '%s': %s" , |
84 | loaderparams.kernel_filename, |
85 | load_elf_strerror(kernel_size)); |
86 | exit(1); |
87 | } |
88 | |
89 | /* load initrd */ |
90 | initrd_size = 0; |
91 | initrd_offset = 0; |
92 | if (loaderparams.initrd_filename) { |
93 | initrd_size = get_image_size(loaderparams.initrd_filename); |
94 | if (initrd_size > 0) { |
95 | initrd_offset = (kernel_high + ~INITRD_PAGE_MASK) & |
96 | INITRD_PAGE_MASK; |
97 | if (initrd_offset + initrd_size > loaderparams.ram_size) { |
98 | error_report("memory too small for initial ram disk '%s'" , |
99 | loaderparams.initrd_filename); |
100 | exit(1); |
101 | } |
102 | initrd_size = load_image_targphys(loaderparams.initrd_filename, |
103 | initrd_offset, loaderparams.ram_size - initrd_offset); |
104 | } |
105 | if (initrd_size == (target_ulong) -1) { |
106 | error_report("could not load initial ram disk '%s'" , |
107 | loaderparams.initrd_filename); |
108 | exit(1); |
109 | } |
110 | } |
111 | return entry; |
112 | } |
113 | |
114 | static void main_cpu_reset(void *opaque) |
115 | { |
116 | ResetData *s = (ResetData *)opaque; |
117 | CPUMIPSState *env = &s->cpu->env; |
118 | |
119 | cpu_reset(CPU(s->cpu)); |
120 | env->active_tc.PC = s->vector & ~(target_ulong)1; |
121 | if (s->vector & 1) { |
122 | env->hflags |= MIPS_HFLAG_M16; |
123 | } |
124 | } |
125 | |
126 | static void mipsnet_init(int base, qemu_irq irq, NICInfo *nd) |
127 | { |
128 | DeviceState *dev; |
129 | SysBusDevice *s; |
130 | |
131 | dev = qdev_create(NULL, "mipsnet" ); |
132 | qdev_set_nic_properties(dev, nd); |
133 | qdev_init_nofail(dev); |
134 | |
135 | s = SYS_BUS_DEVICE(dev); |
136 | sysbus_connect_irq(s, 0, irq); |
137 | memory_region_add_subregion(get_system_io(), |
138 | base, |
139 | sysbus_mmio_get_region(s, 0)); |
140 | } |
141 | |
142 | static void |
143 | mips_mipssim_init(MachineState *machine) |
144 | { |
145 | ram_addr_t ram_size = machine->ram_size; |
146 | const char *kernel_filename = machine->kernel_filename; |
147 | const char *kernel_cmdline = machine->kernel_cmdline; |
148 | const char *initrd_filename = machine->initrd_filename; |
149 | char *filename; |
150 | MemoryRegion *address_space_mem = get_system_memory(); |
151 | MemoryRegion *isa = g_new(MemoryRegion, 1); |
152 | MemoryRegion *ram = g_new(MemoryRegion, 1); |
153 | MemoryRegion *bios = g_new(MemoryRegion, 1); |
154 | MIPSCPU *cpu; |
155 | CPUMIPSState *env; |
156 | ResetData *reset_info; |
157 | int bios_size; |
158 | |
159 | /* Init CPUs. */ |
160 | cpu = MIPS_CPU(cpu_create(machine->cpu_type)); |
161 | env = &cpu->env; |
162 | |
163 | reset_info = g_malloc0(sizeof(ResetData)); |
164 | reset_info->cpu = cpu; |
165 | reset_info->vector = env->active_tc.PC; |
166 | qemu_register_reset(main_cpu_reset, reset_info); |
167 | |
168 | /* Allocate RAM. */ |
169 | memory_region_allocate_system_memory(ram, NULL, "mips_mipssim.ram" , |
170 | ram_size); |
171 | memory_region_init_ram(bios, NULL, "mips_mipssim.bios" , BIOS_SIZE, |
172 | &error_fatal); |
173 | memory_region_set_readonly(bios, true); |
174 | |
175 | memory_region_add_subregion(address_space_mem, 0, ram); |
176 | |
177 | /* Map the BIOS / boot exception handler. */ |
178 | memory_region_add_subregion(address_space_mem, 0x1fc00000LL, bios); |
179 | /* Load a BIOS / boot exception handler image. */ |
180 | if (bios_name == NULL) { |
181 | bios_name = BIOS_FILENAME; |
182 | } |
183 | filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name); |
184 | if (filename) { |
185 | bios_size = load_image_targphys(filename, 0x1fc00000LL, BIOS_SIZE); |
186 | g_free(filename); |
187 | } else { |
188 | bios_size = -1; |
189 | } |
190 | if ((bios_size < 0 || bios_size > BIOS_SIZE) && |
191 | !kernel_filename && !qtest_enabled()) { |
192 | /* Bail out if we have neither a kernel image nor boot vector code. */ |
193 | error_report("Could not load MIPS bios '%s', and no " |
194 | "-kernel argument was specified" , bios_name); |
195 | exit(1); |
196 | } else { |
197 | /* We have a boot vector start address. */ |
198 | env->active_tc.PC = (target_long)(int32_t)0xbfc00000; |
199 | } |
200 | |
201 | if (kernel_filename) { |
202 | loaderparams.ram_size = ram_size; |
203 | loaderparams.kernel_filename = kernel_filename; |
204 | loaderparams.kernel_cmdline = kernel_cmdline; |
205 | loaderparams.initrd_filename = initrd_filename; |
206 | reset_info->vector = load_kernel(); |
207 | } |
208 | |
209 | /* Init CPU internal devices. */ |
210 | cpu_mips_irq_init_cpu(cpu); |
211 | cpu_mips_clock_init(cpu); |
212 | |
213 | /* Register 64 KB of ISA IO space at 0x1fd00000. */ |
214 | memory_region_init_alias(isa, NULL, "isa_mmio" , |
215 | get_system_io(), 0, 0x00010000); |
216 | memory_region_add_subregion(get_system_memory(), 0x1fd00000, isa); |
217 | |
218 | /* |
219 | * A single 16450 sits at offset 0x3f8. It is attached to |
220 | * MIPS CPU INT2, which is interrupt 4. |
221 | */ |
222 | if (serial_hd(0)) |
223 | serial_init(0x3f8, env->irq[4], 115200, serial_hd(0), |
224 | get_system_io()); |
225 | |
226 | if (nd_table[0].used) |
227 | /* MIPSnet uses the MIPS CPU INT0, which is interrupt 2. */ |
228 | mipsnet_init(0x4200, env->irq[2], &nd_table[0]); |
229 | } |
230 | |
231 | static void mips_mipssim_machine_init(MachineClass *mc) |
232 | { |
233 | mc->desc = "MIPS MIPSsim platform" ; |
234 | mc->init = mips_mipssim_init; |
235 | #ifdef TARGET_MIPS64 |
236 | mc->default_cpu_type = MIPS_CPU_TYPE_NAME("5Kf" ); |
237 | #else |
238 | mc->default_cpu_type = MIPS_CPU_TYPE_NAME("24Kf" ); |
239 | #endif |
240 | } |
241 | |
242 | DEFINE_MACHINE("mipssim" , mips_mipssim_machine_init) |
243 | |