1 | /* |
2 | * QEMU/MIPS pseudo-board |
3 | * |
4 | * emulates a simple machine with ISA-like bus. |
5 | * ISA IO space mapped to the 0x14000000 (PHYS) and |
6 | * ISA memory at the 0x10000000 (PHYS, 16Mb in size). |
7 | * All peripherial devices are attached to this "bus" with |
8 | * the standard PC ISA addresses. |
9 | */ |
10 | |
11 | #include "qemu/osdep.h" |
12 | #include "qemu/units.h" |
13 | #include "qapi/error.h" |
14 | #include "qemu-common.h" |
15 | #include "cpu.h" |
16 | #include "hw/mips/mips.h" |
17 | #include "hw/mips/cpudevs.h" |
18 | #include "hw/i386/pc.h" |
19 | #include "hw/char/serial.h" |
20 | #include "hw/isa/isa.h" |
21 | #include "net/net.h" |
22 | #include "hw/net/ne2000-isa.h" |
23 | #include "sysemu/sysemu.h" |
24 | #include "hw/boards.h" |
25 | #include "hw/block/flash.h" |
26 | #include "qemu/log.h" |
27 | #include "hw/mips/bios.h" |
28 | #include "hw/ide.h" |
29 | #include "hw/loader.h" |
30 | #include "elf.h" |
31 | #include "hw/timer/mc146818rtc.h" |
32 | #include "hw/input/i8042.h" |
33 | #include "hw/timer/i8254.h" |
34 | #include "exec/address-spaces.h" |
35 | #include "sysemu/qtest.h" |
36 | #include "sysemu/reset.h" |
37 | #include "sysemu/runstate.h" |
38 | #include "qemu/error-report.h" |
39 | |
40 | #define MAX_IDE_BUS 2 |
41 | |
42 | static const int ide_iobase[2] = { 0x1f0, 0x170 }; |
43 | static const int ide_iobase2[2] = { 0x3f6, 0x376 }; |
44 | static const int ide_irq[2] = { 14, 15 }; |
45 | |
46 | static ISADevice *pit; /* PIT i8254 */ |
47 | |
48 | /* i8254 PIT is attached to the IRQ0 at PIC i8259 */ |
49 | |
50 | static struct _loaderparams { |
51 | int ram_size; |
52 | const char *kernel_filename; |
53 | const char *kernel_cmdline; |
54 | const char *initrd_filename; |
55 | } loaderparams; |
56 | |
57 | static void mips_qemu_write (void *opaque, hwaddr addr, |
58 | uint64_t val, unsigned size) |
59 | { |
60 | if ((addr & 0xffff) == 0 && val == 42) |
61 | qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET); |
62 | else if ((addr & 0xffff) == 4 && val == 42) |
63 | qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN); |
64 | } |
65 | |
66 | static uint64_t mips_qemu_read (void *opaque, hwaddr addr, |
67 | unsigned size) |
68 | { |
69 | return 0; |
70 | } |
71 | |
72 | static const MemoryRegionOps mips_qemu_ops = { |
73 | .read = mips_qemu_read, |
74 | .write = mips_qemu_write, |
75 | .endianness = DEVICE_NATIVE_ENDIAN, |
76 | }; |
77 | |
78 | typedef struct ResetData { |
79 | MIPSCPU *cpu; |
80 | uint64_t vector; |
81 | } ResetData; |
82 | |
83 | static int64_t load_kernel(void) |
84 | { |
85 | const size_t params_size = 264; |
86 | int64_t entry, kernel_high, initrd_size; |
87 | long kernel_size; |
88 | ram_addr_t initrd_offset; |
89 | uint32_t *params_buf; |
90 | int big_endian; |
91 | |
92 | #ifdef TARGET_WORDS_BIGENDIAN |
93 | big_endian = 1; |
94 | #else |
95 | big_endian = 0; |
96 | #endif |
97 | kernel_size = load_elf(loaderparams.kernel_filename, NULL, |
98 | cpu_mips_kseg0_to_phys, NULL, |
99 | (uint64_t *)&entry, NULL, |
100 | (uint64_t *)&kernel_high, big_endian, |
101 | EM_MIPS, 1, 0); |
102 | if (kernel_size >= 0) { |
103 | if ((entry & ~0x7fffffffULL) == 0x80000000) |
104 | entry = (int32_t)entry; |
105 | } else { |
106 | error_report("could not load kernel '%s': %s" , |
107 | loaderparams.kernel_filename, |
108 | load_elf_strerror(kernel_size)); |
109 | exit(1); |
110 | } |
111 | |
112 | /* load initrd */ |
113 | initrd_size = 0; |
114 | initrd_offset = 0; |
115 | if (loaderparams.initrd_filename) { |
116 | initrd_size = get_image_size (loaderparams.initrd_filename); |
117 | if (initrd_size > 0) { |
118 | initrd_offset = (kernel_high + ~INITRD_PAGE_MASK) & INITRD_PAGE_MASK; |
119 | if (initrd_offset + initrd_size > ram_size) { |
120 | error_report("memory too small for initial ram disk '%s'" , |
121 | loaderparams.initrd_filename); |
122 | exit(1); |
123 | } |
124 | initrd_size = load_image_targphys(loaderparams.initrd_filename, |
125 | initrd_offset, |
126 | ram_size - initrd_offset); |
127 | } |
128 | if (initrd_size == (target_ulong) -1) { |
129 | error_report("could not load initial ram disk '%s'" , |
130 | loaderparams.initrd_filename); |
131 | exit(1); |
132 | } |
133 | } |
134 | |
135 | /* Store command line. */ |
136 | params_buf = g_malloc(params_size); |
137 | |
138 | params_buf[0] = tswap32(ram_size); |
139 | params_buf[1] = tswap32(0x12345678); |
140 | |
141 | if (initrd_size > 0) { |
142 | snprintf((char *)params_buf + 8, 256, "rd_start=0x%" PRIx64 " rd_size=%" PRId64 " %s" , |
143 | cpu_mips_phys_to_kseg0(NULL, initrd_offset), |
144 | initrd_size, loaderparams.kernel_cmdline); |
145 | } else { |
146 | snprintf((char *)params_buf + 8, 256, "%s" , loaderparams.kernel_cmdline); |
147 | } |
148 | |
149 | rom_add_blob_fixed("params" , params_buf, params_size, |
150 | 16 * MiB - params_size); |
151 | |
152 | g_free(params_buf); |
153 | return entry; |
154 | } |
155 | |
156 | static void main_cpu_reset(void *opaque) |
157 | { |
158 | ResetData *s = (ResetData *)opaque; |
159 | CPUMIPSState *env = &s->cpu->env; |
160 | |
161 | cpu_reset(CPU(s->cpu)); |
162 | env->active_tc.PC = s->vector; |
163 | } |
164 | |
165 | static const int sector_len = 32 * KiB; |
166 | static |
167 | void mips_r4k_init(MachineState *machine) |
168 | { |
169 | ram_addr_t ram_size = machine->ram_size; |
170 | const char *kernel_filename = machine->kernel_filename; |
171 | const char *kernel_cmdline = machine->kernel_cmdline; |
172 | const char *initrd_filename = machine->initrd_filename; |
173 | char *filename; |
174 | MemoryRegion *address_space_mem = get_system_memory(); |
175 | MemoryRegion *ram = g_new(MemoryRegion, 1); |
176 | MemoryRegion *bios; |
177 | MemoryRegion *iomem = g_new(MemoryRegion, 1); |
178 | MemoryRegion *isa_io = g_new(MemoryRegion, 1); |
179 | MemoryRegion *isa_mem = g_new(MemoryRegion, 1); |
180 | int bios_size; |
181 | MIPSCPU *cpu; |
182 | CPUMIPSState *env; |
183 | ResetData *reset_info; |
184 | int i; |
185 | qemu_irq *i8259; |
186 | ISABus *isa_bus; |
187 | DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS]; |
188 | DriveInfo *dinfo; |
189 | int be; |
190 | |
191 | /* init CPUs */ |
192 | cpu = MIPS_CPU(cpu_create(machine->cpu_type)); |
193 | env = &cpu->env; |
194 | |
195 | reset_info = g_malloc0(sizeof(ResetData)); |
196 | reset_info->cpu = cpu; |
197 | reset_info->vector = env->active_tc.PC; |
198 | qemu_register_reset(main_cpu_reset, reset_info); |
199 | |
200 | /* allocate RAM */ |
201 | if (ram_size > 256 * MiB) { |
202 | error_report("Too much memory for this machine: %" PRId64 "MB," |
203 | " maximum 256MB" , ram_size / MiB); |
204 | exit(1); |
205 | } |
206 | memory_region_allocate_system_memory(ram, NULL, "mips_r4k.ram" , ram_size); |
207 | |
208 | memory_region_add_subregion(address_space_mem, 0, ram); |
209 | |
210 | memory_region_init_io(iomem, NULL, &mips_qemu_ops, NULL, "mips-qemu" , 0x10000); |
211 | memory_region_add_subregion(address_space_mem, 0x1fbf0000, iomem); |
212 | |
213 | /* Try to load a BIOS image. If this fails, we continue regardless, |
214 | but initialize the hardware ourselves. When a kernel gets |
215 | preloaded we also initialize the hardware, since the BIOS wasn't |
216 | run. */ |
217 | if (bios_name == NULL) |
218 | bios_name = BIOS_FILENAME; |
219 | filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name); |
220 | if (filename) { |
221 | bios_size = get_image_size(filename); |
222 | } else { |
223 | bios_size = -1; |
224 | } |
225 | #ifdef TARGET_WORDS_BIGENDIAN |
226 | be = 1; |
227 | #else |
228 | be = 0; |
229 | #endif |
230 | if ((bios_size > 0) && (bios_size <= BIOS_SIZE)) { |
231 | bios = g_new(MemoryRegion, 1); |
232 | memory_region_init_ram(bios, NULL, "mips_r4k.bios" , BIOS_SIZE, |
233 | &error_fatal); |
234 | memory_region_set_readonly(bios, true); |
235 | memory_region_add_subregion(get_system_memory(), 0x1fc00000, bios); |
236 | |
237 | load_image_targphys(filename, 0x1fc00000, BIOS_SIZE); |
238 | } else if ((dinfo = drive_get(IF_PFLASH, 0, 0)) != NULL) { |
239 | uint32_t mips_rom = 0x00400000; |
240 | if (!pflash_cfi01_register(0x1fc00000, "mips_r4k.bios" , mips_rom, |
241 | blk_by_legacy_dinfo(dinfo), |
242 | sector_len, 4, 0, 0, 0, 0, be)) { |
243 | fprintf(stderr, "qemu: Error registering flash memory.\n" ); |
244 | } |
245 | } else if (!qtest_enabled()) { |
246 | /* not fatal */ |
247 | warn_report("could not load MIPS bios '%s'" , bios_name); |
248 | } |
249 | g_free(filename); |
250 | |
251 | if (kernel_filename) { |
252 | loaderparams.ram_size = ram_size; |
253 | loaderparams.kernel_filename = kernel_filename; |
254 | loaderparams.kernel_cmdline = kernel_cmdline; |
255 | loaderparams.initrd_filename = initrd_filename; |
256 | reset_info->vector = load_kernel(); |
257 | } |
258 | |
259 | /* Init CPU internal devices */ |
260 | cpu_mips_irq_init_cpu(cpu); |
261 | cpu_mips_clock_init(cpu); |
262 | |
263 | /* ISA bus: IO space at 0x14000000, mem space at 0x10000000 */ |
264 | memory_region_init_alias(isa_io, NULL, "isa-io" , |
265 | get_system_io(), 0, 0x00010000); |
266 | memory_region_init(isa_mem, NULL, "isa-mem" , 0x01000000); |
267 | memory_region_add_subregion(get_system_memory(), 0x14000000, isa_io); |
268 | memory_region_add_subregion(get_system_memory(), 0x10000000, isa_mem); |
269 | isa_bus = isa_bus_new(NULL, isa_mem, get_system_io(), &error_abort); |
270 | |
271 | /* The PIC is attached to the MIPS CPU INT0 pin */ |
272 | i8259 = i8259_init(isa_bus, env->irq[2]); |
273 | isa_bus_irqs(isa_bus, i8259); |
274 | |
275 | mc146818_rtc_init(isa_bus, 2000, NULL); |
276 | |
277 | pit = i8254_pit_init(isa_bus, 0x40, 0, NULL); |
278 | |
279 | serial_hds_isa_init(isa_bus, 0, MAX_ISA_SERIAL_PORTS); |
280 | |
281 | isa_vga_init(isa_bus); |
282 | |
283 | if (nd_table[0].used) |
284 | isa_ne2000_init(isa_bus, 0x300, 9, &nd_table[0]); |
285 | |
286 | ide_drive_get(hd, ARRAY_SIZE(hd)); |
287 | for(i = 0; i < MAX_IDE_BUS; i++) |
288 | isa_ide_init(isa_bus, ide_iobase[i], ide_iobase2[i], ide_irq[i], |
289 | hd[MAX_IDE_DEVS * i], |
290 | hd[MAX_IDE_DEVS * i + 1]); |
291 | |
292 | isa_create_simple(isa_bus, TYPE_I8042); |
293 | } |
294 | |
295 | static void mips_machine_init(MachineClass *mc) |
296 | { |
297 | mc->desc = "mips r4k platform" ; |
298 | mc->init = mips_r4k_init; |
299 | mc->block_default_type = IF_IDE; |
300 | #ifdef TARGET_MIPS64 |
301 | mc->default_cpu_type = MIPS_CPU_TYPE_NAME("R4000" ); |
302 | #else |
303 | mc->default_cpu_type = MIPS_CPU_TYPE_NAME("24Kf" ); |
304 | #endif |
305 | |
306 | } |
307 | |
308 | DEFINE_MACHINE("mips" , mips_machine_init) |
309 | |