| 1 | //============================================================================ |
| 2 | // |
| 3 | // SSSS tt lll lll |
| 4 | // SS SS tt ll ll |
| 5 | // SS tttttt eeee ll ll aaaa |
| 6 | // SSSS tt ee ee ll ll aa |
| 7 | // SS tt eeeeee ll ll aaaaa -- "An Atari 2600 VCS Emulator" |
| 8 | // SS SS tt ee ll ll aa aa |
| 9 | // SSSS ttt eeeee llll llll aaaaa |
| 10 | // |
| 11 | // Copyright (c) 1995-2019 by Bradford W. Mott, Stephen Anthony |
| 12 | // and the Stella Team |
| 13 | // |
| 14 | // See the file "License.txt" for information on usage and redistribution of |
| 15 | // this file, and for a DISCLAIMER OF ALL WARRANTIES. |
| 16 | //============================================================================ |
| 17 | |
| 18 | #ifndef RIOT_DEBUG_HXX |
| 19 | #define RIOT_DEBUG_HXX |
| 20 | |
| 21 | class M6532; |
| 22 | class Debugger; |
| 23 | class RiotDebug; |
| 24 | |
| 25 | #include "DebuggerSystem.hxx" |
| 26 | |
| 27 | class RiotState : public DebuggerState |
| 28 | { |
| 29 | public: |
| 30 | uInt8 SWCHA_R, SWCHA_W, SWACNT, SWCHB_R, SWCHB_W, SWBCNT; |
| 31 | BoolArray swchaReadBits; |
| 32 | BoolArray swchaWriteBits; |
| 33 | BoolArray swacntBits; |
| 34 | BoolArray swchbReadBits; |
| 35 | BoolArray swchbWriteBits; |
| 36 | BoolArray swbcntBits; |
| 37 | |
| 38 | uInt8 TIM1T, TIM8T, TIM64T, T1024T, INTIM, TIMINT; |
| 39 | Int32 TIMCLKS, INTIMCLKS, TIMDIV; |
| 40 | |
| 41 | // These are actually from the TIA, but are I/O related |
| 42 | uInt8 INPT0, INPT1, INPT2, INPT3, INPT4, INPT5; |
| 43 | bool INPTLatch, INPTDump; |
| 44 | |
| 45 | RiotState() |
| 46 | : SWCHA_R(0), SWCHA_W(0), SWACNT(0), SWCHB_R(0), SWCHB_W(0), SWBCNT(0), |
| 47 | TIM1T(0), TIM8T(0), TIM64T(0), T1024T(0), INTIM(0), TIMINT(0), |
| 48 | TIMCLKS(0), INTIMCLKS(0), TIMDIV(0), |
| 49 | INPT0(0), INPT1(0), INPT2(0), INPT3(0), INPT4(0), INPT5(0), |
| 50 | INPTLatch(false), INPTDump(false) |
| 51 | { } |
| 52 | }; |
| 53 | |
| 54 | class RiotDebug : public DebuggerSystem |
| 55 | { |
| 56 | public: |
| 57 | RiotDebug(Debugger& dbg, Console& console); |
| 58 | |
| 59 | const DebuggerState& getState() override; |
| 60 | const DebuggerState& getOldState() override { return myOldState; } |
| 61 | |
| 62 | void saveOldState() override; |
| 63 | string toString() override; |
| 64 | |
| 65 | /* Port A and B registers */ |
| 66 | uInt8 swcha(int newVal = -1); |
| 67 | uInt8 swacnt(int newVal = -1); |
| 68 | uInt8 swchb(int newVal = -1); |
| 69 | uInt8 swbcnt(int newVal = -1); |
| 70 | |
| 71 | /* TIA INPTx and VBLANK registers |
| 72 | Techically not part of the RIOT, but more appropriately placed here */ |
| 73 | uInt8 inpt(int x); |
| 74 | bool vblank(int bit); |
| 75 | |
| 76 | /* Timer registers & associated clock */ |
| 77 | uInt8 tim1T(int newVal = -1); |
| 78 | uInt8 tim8T(int newVal = -1); |
| 79 | uInt8 tim64T(int newVal = -1); |
| 80 | uInt8 tim1024T(int newVal = -1); |
| 81 | uInt8 intim() const; |
| 82 | uInt8 timint() const; |
| 83 | Int32 timClocks() const; |
| 84 | Int32 intimClocks() const; |
| 85 | Int32 timDivider() const; |
| 86 | |
| 87 | /* Console switches */ |
| 88 | bool diffP0(int newVal = -1); |
| 89 | bool diffP1(int newVal = -1); |
| 90 | bool tvType(int newVal = -1); |
| 91 | bool select(int newVal = -1); |
| 92 | bool reset(int newVal = -1); |
| 93 | |
| 94 | /* Port A description */ |
| 95 | string dirP0String(); |
| 96 | string dirP1String(); |
| 97 | |
| 98 | /* Port B description */ |
| 99 | string diffP0String(); |
| 100 | string diffP1String(); |
| 101 | string tvTypeString(); |
| 102 | string switchesString(); |
| 103 | |
| 104 | private: |
| 105 | RiotState myState; |
| 106 | RiotState myOldState; |
| 107 | |
| 108 | private: |
| 109 | // Following constructors and assignment operators not supported |
| 110 | RiotDebug() = delete; |
| 111 | RiotDebug(const RiotDebug&) = delete; |
| 112 | RiotDebug(RiotDebug&&) = delete; |
| 113 | RiotDebug& operator=(const RiotDebug&) = delete; |
| 114 | RiotDebug& operator=(RiotDebug&&) = delete; |
| 115 | }; |
| 116 | |
| 117 | #endif |
| 118 | |