1 | #line 1 "ad_x86_gen.cpp" |
2 | // |
3 | // Copyright (c) 2003, 2019, Oracle and/or its affiliates. All rights reserved. |
4 | // DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
5 | // |
6 | // This code is free software; you can redistribute it and/or modify it |
7 | // under the terms of the GNU General Public License version 2 only, as |
8 | // published by the Free Software Foundation. |
9 | // |
10 | // This code is distributed in the hope that it will be useful, but WITHOUT |
11 | // ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
12 | // FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
13 | // version 2 for more details (a copy is included in the LICENSE file that |
14 | // accompanied this code). |
15 | // |
16 | // You should have received a copy of the GNU General Public License version |
17 | // 2 along with this work; if not, write to the Free Software Foundation, |
18 | // Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. |
19 | // |
20 | // Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
21 | // or visit www.oracle.com if you need additional information or have any |
22 | // questions. |
23 | // |
24 | // |
25 | |
26 | // Machine Generated File. Do Not Edit! |
27 | |
28 | #include "precompiled.hpp" |
29 | #include "adfiles/ad_x86.hpp" |
30 | #include "opto/cfgnode.hpp" |
31 | #include "opto/locknode.hpp" |
32 | |
33 | |
34 | //------------------------- MachOper Generator --------------- |
35 | // A switch statement on the dense-packed user-defined type system |
36 | // that invokes 'new' on the corresponding class constructor. |
37 | |
38 | MachOper *State::MachOperGenerator(int opcode){ |
39 | |
40 | switch(opcode) { |
41 | case UNIVERSE: |
42 | return new UniverseOper( ); |
43 | case LABEL: |
44 | return new labelOper( ); |
45 | case SREGI: |
46 | return new sRegIOper( ); |
47 | case SREGP: |
48 | return new sRegPOper( ); |
49 | case SREGF: |
50 | return new sRegFOper( ); |
51 | case SREGD: |
52 | return new sRegDOper( ); |
53 | case SREGL: |
54 | return new sRegLOper( ); |
55 | case METHOD: |
56 | return new methodOper( ); |
57 | case IMMI: |
58 | return new immIOper(_leaf->get_int() ); |
59 | case IMMI0: |
60 | return new immI0Oper(_leaf->get_int() ); |
61 | case IMMI1: |
62 | return new immI1Oper(_leaf->get_int() ); |
63 | case IMMI_M1: |
64 | return new immI_M1Oper(_leaf->get_int() ); |
65 | case IMMI2: |
66 | return new immI2Oper(_leaf->get_int() ); |
67 | case IMMI8: |
68 | return new immI8Oper(_leaf->get_int() ); |
69 | case IMMU8: |
70 | return new immU8Oper(_leaf->get_int() ); |
71 | case IMMI16: |
72 | return new immI16Oper(_leaf->get_int() ); |
73 | case IMMU31: |
74 | return new immU31Oper(_leaf->get_int() ); |
75 | case IMMI_32: |
76 | return new immI_32Oper(_leaf->get_int() ); |
77 | case IMMI_64: |
78 | return new immI_64Oper(_leaf->get_int() ); |
79 | case IMMP: |
80 | return new immPOper(_leaf->bottom_type()->is_ptr() ); |
81 | case IMMP0: |
82 | return new immP0Oper(_leaf->bottom_type()->is_ptr() ); |
83 | case IMMN: |
84 | return new immNOper(_leaf->bottom_type()->is_narrowoop() ); |
85 | case IMMNKLASS: |
86 | return new immNKlassOper(_leaf->bottom_type()->is_narrowklass() ); |
87 | case IMMN0: |
88 | return new immN0Oper(_leaf->bottom_type()->is_narrowoop() ); |
89 | case IMMP31: |
90 | return new immP31Oper(_leaf->bottom_type()->is_ptr() ); |
91 | case IMML: |
92 | return new immLOper(_leaf->get_long() ); |
93 | case IMML8: |
94 | return new immL8Oper(_leaf->get_long() ); |
95 | case IMMUL32: |
96 | return new immUL32Oper(_leaf->get_long() ); |
97 | case IMML32: |
98 | return new immL32Oper(_leaf->get_long() ); |
99 | case IMML0: |
100 | return new immL0Oper(_leaf->get_long() ); |
101 | case IMML1: |
102 | return new immL1Oper(_leaf->get_long() ); |
103 | case IMML_M1: |
104 | return new immL_M1Oper(_leaf->get_long() ); |
105 | case IMML10: |
106 | return new immL10Oper(_leaf->get_long() ); |
107 | case IMML_127: |
108 | return new immL_127Oper(_leaf->get_long() ); |
109 | case IMML_32BITS: |
110 | return new immL_32bitsOper(_leaf->get_long() ); |
111 | case IMMF0: |
112 | return new immF0Oper(_leaf->getf() ); |
113 | case IMMF: |
114 | return new immFOper(_leaf->getf() ); |
115 | case IMMD0: |
116 | return new immD0Oper(_leaf->getd() ); |
117 | case IMMD: |
118 | return new immDOper(_leaf->getd() ); |
119 | case IMMI_16: |
120 | return new immI_16Oper(_leaf->get_int() ); |
121 | case IMMI_24: |
122 | return new immI_24Oper(_leaf->get_int() ); |
123 | case IMMI_255: |
124 | return new immI_255Oper(_leaf->get_int() ); |
125 | case IMMI_65535: |
126 | return new immI_65535Oper(_leaf->get_int() ); |
127 | case IMML_255: |
128 | return new immL_255Oper(_leaf->get_long() ); |
129 | case IMML_65535: |
130 | return new immL_65535Oper(_leaf->get_long() ); |
131 | case RREGI: |
132 | return new rRegIOper( ); |
133 | case RAX_REGI: |
134 | return new rax_RegIOper( ); |
135 | case RBX_REGI: |
136 | return new rbx_RegIOper( ); |
137 | case RCX_REGI: |
138 | return new rcx_RegIOper( ); |
139 | case RDX_REGI: |
140 | return new rdx_RegIOper( ); |
141 | case RDI_REGI: |
142 | return new rdi_RegIOper( ); |
143 | case NO_RCX_REGI: |
144 | return new no_rcx_RegIOper( ); |
145 | case NO_RAX_RDX_REGI: |
146 | return new no_rax_rdx_RegIOper( ); |
147 | case ANY_REGP: |
148 | return new any_RegPOper( ); |
149 | case RREGP: |
150 | return new rRegPOper( ); |
151 | case RREGN: |
152 | return new rRegNOper( ); |
153 | case NO_RAX_REGP: |
154 | return new no_rax_RegPOper( ); |
155 | case NO_RBP_REGP: |
156 | return new no_rbp_RegPOper( ); |
157 | case NO_RAX_RBX_REGP: |
158 | return new no_rax_rbx_RegPOper( ); |
159 | case RAX_REGP: |
160 | return new rax_RegPOper( ); |
161 | case RAX_REGN: |
162 | return new rax_RegNOper( ); |
163 | case RBX_REGP: |
164 | return new rbx_RegPOper( ); |
165 | case RSI_REGP: |
166 | return new rsi_RegPOper( ); |
167 | case RDI_REGP: |
168 | return new rdi_RegPOper( ); |
169 | case R15_REGP: |
170 | return new r15_RegPOper( ); |
171 | case RREGL: |
172 | return new rRegLOper( ); |
173 | case NO_RAX_RDX_REGL: |
174 | return new no_rax_rdx_RegLOper( ); |
175 | case NO_RAX_REGL: |
176 | return new no_rax_RegLOper( ); |
177 | case NO_RCX_REGL: |
178 | return new no_rcx_RegLOper( ); |
179 | case RAX_REGL: |
180 | return new rax_RegLOper( ); |
181 | case RCX_REGL: |
182 | return new rcx_RegLOper( ); |
183 | case RDX_REGL: |
184 | return new rdx_RegLOper( ); |
185 | case RFLAGSREG: |
186 | return new rFlagsRegOper( ); |
187 | case RFLAGSREGU: |
188 | return new rFlagsRegUOper( ); |
189 | case RFLAGSREGUCF: |
190 | return new rFlagsRegUCFOper( ); |
191 | case REGF: |
192 | return new regFOper( ); |
193 | case LEGREGF: |
194 | return new legRegFOper( ); |
195 | case VLREGF: |
196 | return new vlRegFOper( ); |
197 | case REGD: |
198 | return new regDOper( ); |
199 | case LEGREGD: |
200 | return new legRegDOper( ); |
201 | case VLREGD: |
202 | return new vlRegDOper( ); |
203 | case VECS: |
204 | return new vecSOper( ); |
205 | case LEGVECS: |
206 | return new legVecSOper( ); |
207 | case VECD: |
208 | return new vecDOper( ); |
209 | case LEGVECD: |
210 | return new legVecDOper( ); |
211 | case VECX: |
212 | return new vecXOper( ); |
213 | case LEGVECX: |
214 | return new legVecXOper( ); |
215 | case VECY: |
216 | return new vecYOper( ); |
217 | case LEGVECY: |
218 | return new legVecYOper( ); |
219 | case INDIRECT: |
220 | return new indirectOper( ); |
221 | case INDOFFSET8: |
222 | return new indOffset8Oper(_kids[1]->_leaf->get_long() ); |
223 | case INDOFFSET32: |
224 | return new indOffset32Oper(_kids[1]->_leaf->get_long() ); |
225 | case INDINDEXOFFSET: |
226 | return new indIndexOffsetOper(_kids[1]->_leaf->get_long() ); |
227 | case INDINDEX: |
228 | return new indIndexOper( ); |
229 | case INDINDEXSCALE: |
230 | return new indIndexScaleOper(_kids[1]->_kids[1]->_leaf->get_int() ); |
231 | case INDPOSINDEXSCALE: |
232 | return new indPosIndexScaleOper(_kids[1]->_kids[1]->_leaf->get_int() ); |
233 | case INDINDEXSCALEOFFSET: |
234 | return new indIndexScaleOffsetOper(_kids[0]->_kids[1]->_kids[1]->_leaf->get_int(), _kids[1]->_leaf->get_long() ); |
235 | case INDPOSINDEXOFFSET: |
236 | return new indPosIndexOffsetOper(_kids[1]->_leaf->get_long() ); |
237 | case INDPOSINDEXSCALEOFFSET: |
238 | return new indPosIndexScaleOffsetOper(_kids[0]->_kids[1]->_kids[1]->_leaf->get_int(), _kids[1]->_leaf->get_long() ); |
239 | case INDCOMPRESSEDOOPOFFSET: |
240 | return new indCompressedOopOffsetOper(_kids[1]->_leaf->get_long() ); |
241 | case INDIRECTNARROW: |
242 | return new indirectNarrowOper( ); |
243 | case INDOFFSET8NARROW: |
244 | return new indOffset8NarrowOper(_kids[1]->_leaf->get_long() ); |
245 | case INDOFFSET32NARROW: |
246 | return new indOffset32NarrowOper(_kids[1]->_leaf->get_long() ); |
247 | case INDINDEXOFFSETNARROW: |
248 | return new indIndexOffsetNarrowOper(_kids[1]->_leaf->get_long() ); |
249 | case INDINDEXNARROW: |
250 | return new indIndexNarrowOper( ); |
251 | case INDINDEXSCALENARROW: |
252 | return new indIndexScaleNarrowOper(_kids[1]->_kids[1]->_leaf->get_int() ); |
253 | case INDINDEXSCALEOFFSETNARROW: |
254 | return new indIndexScaleOffsetNarrowOper(_kids[0]->_kids[1]->_kids[1]->_leaf->get_int(), _kids[1]->_leaf->get_long() ); |
255 | case INDPOSINDEXOFFSETNARROW: |
256 | return new indPosIndexOffsetNarrowOper(_kids[1]->_leaf->get_long() ); |
257 | case INDPOSINDEXSCALEOFFSETNARROW: |
258 | return new indPosIndexScaleOffsetNarrowOper(_kids[0]->_kids[1]->_kids[1]->_leaf->get_int(), _kids[1]->_leaf->get_long() ); |
259 | case STACKSLOTP: |
260 | return new stackSlotPOper( ); |
261 | case STACKSLOTI: |
262 | return new stackSlotIOper( ); |
263 | case STACKSLOTF: |
264 | return new stackSlotFOper( ); |
265 | case STACKSLOTD: |
266 | return new stackSlotDOper( ); |
267 | case STACKSLOTL: |
268 | return new stackSlotLOper( ); |
269 | case CMPOP: |
270 | return new cmpOpOper(_leaf->as_Bool()->_test._test ); |
271 | case CMPOPU: |
272 | return new cmpOpUOper(_leaf->as_Bool()->_test._test ); |
273 | case CMPOPUCF: |
274 | return new cmpOpUCFOper(_leaf->as_Bool()->_test._test ); |
275 | case CMPOPUCF2: |
276 | return new cmpOpUCF2Oper(_leaf->as_Bool()->_test._test ); |
277 | case RXMM0: |
278 | return new rxmm0Oper( ); |
279 | case RXMM1: |
280 | return new rxmm1Oper( ); |
281 | case RXMM2: |
282 | return new rxmm2Oper( ); |
283 | case RXMM3: |
284 | return new rxmm3Oper( ); |
285 | case RXMM4: |
286 | return new rxmm4Oper( ); |
287 | case RXMM5: |
288 | return new rxmm5Oper( ); |
289 | case RXMM6: |
290 | return new rxmm6Oper( ); |
291 | case RXMM7: |
292 | return new rxmm7Oper( ); |
293 | case RXMM8: |
294 | return new rxmm8Oper( ); |
295 | case RXMM9: |
296 | return new rxmm9Oper( ); |
297 | case RXMM10: |
298 | return new rxmm10Oper( ); |
299 | case RXMM11: |
300 | return new rxmm11Oper( ); |
301 | case RXMM12: |
302 | return new rxmm12Oper( ); |
303 | case RXMM13: |
304 | return new rxmm13Oper( ); |
305 | case RXMM14: |
306 | return new rxmm14Oper( ); |
307 | case RXMM15: |
308 | return new rxmm15Oper( ); |
309 | case RXMM16: |
310 | return new rxmm16Oper( ); |
311 | case RXMM17: |
312 | return new rxmm17Oper( ); |
313 | case RXMM18: |
314 | return new rxmm18Oper( ); |
315 | case RXMM19: |
316 | return new rxmm19Oper( ); |
317 | case RXMM20: |
318 | return new rxmm20Oper( ); |
319 | case RXMM21: |
320 | return new rxmm21Oper( ); |
321 | case RXMM22: |
322 | return new rxmm22Oper( ); |
323 | case RXMM23: |
324 | return new rxmm23Oper( ); |
325 | case RXMM24: |
326 | return new rxmm24Oper( ); |
327 | case RXMM25: |
328 | return new rxmm25Oper( ); |
329 | case RXMM26: |
330 | return new rxmm26Oper( ); |
331 | case RXMM27: |
332 | return new rxmm27Oper( ); |
333 | case RXMM28: |
334 | return new rxmm28Oper( ); |
335 | case RXMM29: |
336 | return new rxmm29Oper( ); |
337 | case RXMM30: |
338 | return new rxmm30Oper( ); |
339 | case RXMM31: |
340 | return new rxmm31Oper( ); |
341 | case VECZ: |
342 | return new vecZOper( ); |
343 | case LEGVECZ: |
344 | return new legVecZOper( ); |
345 | case CMPOP_VCMPPD: |
346 | return new cmpOp_vcmppdOper(_leaf->as_Bool()->_test._test ); |
347 | case _ADDP_ANY_REGP_RREGL: return NULL; |
348 | case _LSHIFTL_RREGL_IMMI2: return NULL; |
349 | case _CONVI2L_RREGI_: return NULL; |
350 | case _LSHIFTL__CONVI2L_RREGI__IMMI2: return NULL; |
351 | case _ADDP_ANY_REGP__LSHIFTL_RREGL_IMMI2: return NULL; |
352 | case _ADDP_ANY_REGP__CONVI2L_RREGI_: return NULL; |
353 | case _ADDP_ANY_REGP__LSHIFTL__CONVI2L_RREGI__IMMI2: return NULL; |
354 | case _DECODEN_RREGN_: return NULL; |
355 | case _ADDP__DECODEN_RREGN__RREGL: return NULL; |
356 | case _ADDP__DECODEN_RREGN___LSHIFTL_RREGL_IMMI2: return NULL; |
357 | case _ADDP__DECODEN_RREGN___CONVI2L_RREGI_: return NULL; |
358 | case _ADDP__DECODEN_RREGN___LSHIFTL__CONVI2L_RREGI__IMMI2: return NULL; |
359 | case _LOADB_MEMORY_: return NULL; |
360 | case _LOADUB_MEMORY_: return NULL; |
361 | case _ANDI__LOADUB_MEMORY__IMMI: return NULL; |
362 | case _LOADS_MEMORY_: return NULL; |
363 | case _LSHIFTI__LOADS_MEMORY__IMMI_24: return NULL; |
364 | case _LOADUS_MEMORY_: return NULL; |
365 | case _LSHIFTI__LOADUS_MEMORY__IMMI_24: return NULL; |
366 | case _ANDI__LOADUS_MEMORY__IMMI_255: return NULL; |
367 | case _ANDI__LOADUS_MEMORY__IMMI: return NULL; |
368 | case _LOADI_MEMORY_: return NULL; |
369 | case _LSHIFTI__LOADI_MEMORY__IMMI_24: return NULL; |
370 | case _LSHIFTI__LOADI_MEMORY__IMMI_16: return NULL; |
371 | case _ANDI__LOADI_MEMORY__IMMI_255: return NULL; |
372 | case _ANDI__LOADI_MEMORY__IMMI_65535: return NULL; |
373 | case _ANDI__LOADI_MEMORY__IMMU31: return NULL; |
374 | case _CONVI2L__LOADI_MEMORY__: return NULL; |
375 | case _LOADL_MEMORY_: return NULL; |
376 | case _CASTP2X_RREGP_: return NULL; |
377 | case _CASTP2X__DECODEN_RREGN__: return NULL; |
378 | case _ADDL__LSHIFTL_RREGL_IMMI2_IMML32: return NULL; |
379 | case _BINARY_CMPOP_RFLAGSREG: return NULL; |
380 | case _BINARY_RREGI_RREGI: return NULL; |
381 | case _BINARY_CMPOPU_RFLAGSREGU: return NULL; |
382 | case _BINARY_CMPOPUCF_RFLAGSREGUCF: return NULL; |
383 | case _BINARY_RREGI__LOADI_MEMORY_: return NULL; |
384 | case _BINARY_RREGN_RREGN: return NULL; |
385 | case _BINARY_RREGP_RREGP: return NULL; |
386 | case _BINARY_RREGL_RREGL: return NULL; |
387 | case _BINARY_RREGL__LOADL_MEMORY_: return NULL; |
388 | case _BINARY_REGF_REGF: return NULL; |
389 | case _BINARY_REGD_REGD: return NULL; |
390 | case _ADDI__LOADI_MEMORY__RREGI: return NULL; |
391 | case _ADDI_RREGI__LOADI_MEMORY_: return NULL; |
392 | case _ADDI__LOADI_MEMORY__IMMI: return NULL; |
393 | case _ADDI__LOADI_MEMORY__IMMI1: return NULL; |
394 | case _ADDI__LOADI_MEMORY__IMMI_M1: return NULL; |
395 | case _ADDL__LOADL_MEMORY__RREGL: return NULL; |
396 | case _ADDL_RREGL__LOADL_MEMORY_: return NULL; |
397 | case _ADDL__LOADL_MEMORY__IMML32: return NULL; |
398 | case _ADDL__LOADL_MEMORY__IMML1: return NULL; |
399 | case _ADDL__LOADL_MEMORY__IMML_M1: return NULL; |
400 | case _BINARY_RAX_REGP_RREGP: return NULL; |
401 | case _BINARY_RAX_REGI_RREGI: return NULL; |
402 | case _BINARY_RAX_REGL_RREGL: return NULL; |
403 | case _BINARY_RAX_REGN_RREGN: return NULL; |
404 | case _SUBI__LOADI_MEMORY__RREGI: return NULL; |
405 | case _SUBI__LOADI_MEMORY__IMMI: return NULL; |
406 | case _SUBL__LOADL_MEMORY__RREGL: return NULL; |
407 | case _SUBL__LOADL_MEMORY__IMML32: return NULL; |
408 | case _SUBI_IMMI0_RREGI: return NULL; |
409 | case _SUBI_IMMI0__LOADI_MEMORY_: return NULL; |
410 | case _SUBL_IMML0__LOADL_MEMORY_: return NULL; |
411 | case _LSHIFTI__LOADI_MEMORY__IMMI1: return NULL; |
412 | case _LSHIFTI__LOADI_MEMORY__IMMI8: return NULL; |
413 | case _LSHIFTI__LOADI_MEMORY__RCX_REGI: return NULL; |
414 | case _RSHIFTI__LOADI_MEMORY__IMMI1: return NULL; |
415 | case _RSHIFTI__LOADI_MEMORY__IMMI8: return NULL; |
416 | case _RSHIFTI__LOADI_MEMORY__RCX_REGI: return NULL; |
417 | case _URSHIFTI__LOADI_MEMORY__IMMI1: return NULL; |
418 | case _URSHIFTI__LOADI_MEMORY__IMMI8: return NULL; |
419 | case _URSHIFTI__LOADI_MEMORY__RCX_REGI: return NULL; |
420 | case _LSHIFTL__LOADL_MEMORY__IMMI1: return NULL; |
421 | case _LSHIFTL__LOADL_MEMORY__IMMI8: return NULL; |
422 | case _LSHIFTL__LOADL_MEMORY__RCX_REGI: return NULL; |
423 | case _RSHIFTL__LOADL_MEMORY__IMMI1: return NULL; |
424 | case _RSHIFTL__LOADL_MEMORY__IMMI8: return NULL; |
425 | case _RSHIFTL__LOADL_MEMORY__RCX_REGI: return NULL; |
426 | case _URSHIFTL__LOADL_MEMORY__IMMI1: return NULL; |
427 | case _URSHIFTL__LOADL_MEMORY__IMMI8: return NULL; |
428 | case _URSHIFTL__LOADL_MEMORY__RCX_REGI: return NULL; |
429 | case _LSHIFTI_RREGI_IMMI_24: return NULL; |
430 | case _LSHIFTI_RREGI_IMMI_16: return NULL; |
431 | case _LSHIFTI_RREGI_IMMI1: return NULL; |
432 | case _URSHIFTI_RREGI_IMMI_M1: return NULL; |
433 | case _LSHIFTI_RREGI_IMMI8: return NULL; |
434 | case _URSHIFTI_RREGI_IMMI8: return NULL; |
435 | case _LSHIFTI_NO_RCX_REGI_RCX_REGI: return NULL; |
436 | case _SUBI_IMMI0_RCX_REGI: return NULL; |
437 | case _URSHIFTI_NO_RCX_REGI__SUBI_IMMI0_RCX_REGI: return NULL; |
438 | case _SUBI_IMMI_32_RCX_REGI: return NULL; |
439 | case _URSHIFTI_NO_RCX_REGI__SUBI_IMMI_32_RCX_REGI: return NULL; |
440 | case _URSHIFTI_RREGI_IMMI1: return NULL; |
441 | case _LSHIFTI_RREGI_IMMI_M1: return NULL; |
442 | case _URSHIFTI_NO_RCX_REGI_RCX_REGI: return NULL; |
443 | case _LSHIFTI_NO_RCX_REGI__SUBI_IMMI0_RCX_REGI: return NULL; |
444 | case _LSHIFTI_NO_RCX_REGI__SUBI_IMMI_32_RCX_REGI: return NULL; |
445 | case _LSHIFTL_RREGL_IMMI1: return NULL; |
446 | case _URSHIFTL_RREGL_IMMI_M1: return NULL; |
447 | case _LSHIFTL_RREGL_IMMI8: return NULL; |
448 | case _URSHIFTL_RREGL_IMMI8: return NULL; |
449 | case _LSHIFTL_NO_RCX_REGL_RCX_REGI: return NULL; |
450 | case _URSHIFTL_NO_RCX_REGL__SUBI_IMMI0_RCX_REGI: return NULL; |
451 | case _SUBI_IMMI_64_RCX_REGI: return NULL; |
452 | case _URSHIFTL_NO_RCX_REGL__SUBI_IMMI_64_RCX_REGI: return NULL; |
453 | case _URSHIFTL_RREGL_IMMI1: return NULL; |
454 | case _LSHIFTL_RREGL_IMMI_M1: return NULL; |
455 | case _URSHIFTL_NO_RCX_REGL_RCX_REGI: return NULL; |
456 | case _LSHIFTL_NO_RCX_REGL__SUBI_IMMI0_RCX_REGI: return NULL; |
457 | case _LSHIFTL_NO_RCX_REGL__SUBI_IMMI_64_RCX_REGI: return NULL; |
458 | case _ANDI_RREGI_IMMI_255: return NULL; |
459 | case _ANDI_RREGI_IMMI_65535: return NULL; |
460 | case _ANDI__LOADB_MEMORY__RREGI: return NULL; |
461 | case _ANDI_RREGI__LOADB_MEMORY_: return NULL; |
462 | case _ANDI__LOADI_MEMORY__RREGI: return NULL; |
463 | case _ANDI_RREGI__LOADI_MEMORY_: return NULL; |
464 | case _ANDI__LOADI_MEMORY__IMMI: return NULL; |
465 | case _XORI_RREGI_IMMI_M1: return NULL; |
466 | case _ADDI_RREGI_IMMI_M1: return NULL; |
467 | case _ORI__LOADB_MEMORY__RREGI: return NULL; |
468 | case _ORI_RREGI__LOADB_MEMORY_: return NULL; |
469 | case _ORI__LOADI_MEMORY__RREGI: return NULL; |
470 | case _ORI_RREGI__LOADI_MEMORY_: return NULL; |
471 | case _ORI__LOADI_MEMORY__IMMI: return NULL; |
472 | case _XORI__LOADB_MEMORY__RREGI: return NULL; |
473 | case _XORI_RREGI__LOADB_MEMORY_: return NULL; |
474 | case _XORI__LOADI_MEMORY__RREGI: return NULL; |
475 | case _XORI_RREGI__LOADI_MEMORY_: return NULL; |
476 | case _XORI__LOADI_MEMORY__IMMI: return NULL; |
477 | case _ANDL__LOADL_MEMORY__RREGL: return NULL; |
478 | case _ANDL_RREGL__LOADL_MEMORY_: return NULL; |
479 | case _ANDL__LOADL_MEMORY__IMML32: return NULL; |
480 | case _XORL_RREGL_IMML_M1: return NULL; |
481 | case _SUBL_IMML0_RREGL: return NULL; |
482 | case _ADDL_RREGL_IMML_M1: return NULL; |
483 | case _CASTP2X_ANY_REGP_: return NULL; |
484 | case _ORL__LOADL_MEMORY__RREGL: return NULL; |
485 | case _ORL_RREGL__LOADL_MEMORY_: return NULL; |
486 | case _ORL__LOADL_MEMORY__IMML32: return NULL; |
487 | case _XORL__LOADL_MEMORY__RREGL: return NULL; |
488 | case _XORL_RREGL__LOADL_MEMORY_: return NULL; |
489 | case _XORL__LOADL_MEMORY__IMML32: return NULL; |
490 | case _CMPLTMASK_RREGI_RREGI: return NULL; |
491 | case _ANDI__CMPLTMASK_RREGI_RREGI_RREGI: return NULL; |
492 | case _SUBI_RREGI_RREGI: return NULL; |
493 | case _ANDI_RREGI__CMPLTMASK_RREGI_RREGI: return NULL; |
494 | case _LOADF_MEMORY_: return NULL; |
495 | case _LOADD_MEMORY_: return NULL; |
496 | case _BINARY_RDI_REGP_RCX_REGI: return NULL; |
497 | case _BINARY_RSI_REGP_RDX_REGI: return NULL; |
498 | case _BINARY_RDI_REGP_RDX_REGI: return NULL; |
499 | case _BINARY_RSI_REGP_IMMI: return NULL; |
500 | case _BINARY_RSI_REGP_RAX_REGI: return NULL; |
501 | case _BINARY_RDI_REGP_RSI_REGP: return NULL; |
502 | case _ANDI_RREGI_IMMI: return NULL; |
503 | case _LOADP_MEMORY_: return NULL; |
504 | case _LOADN_MEMORY_: return NULL; |
505 | case _LOADNKLASS_MEMORY_: return NULL; |
506 | case _ANDL_RREGL_IMML32: return NULL; |
507 | case _ANDL__CASTP2X_RREGP___LOADL_MEMORY_: return NULL; |
508 | case _ANDL__LOADL_MEMORY___CASTP2X_RREGP_: return NULL; |
509 | case _ANDI__LOADUB_MEMORY__IMMU8: return NULL; |
510 | case _ANDI__LOADB_MEMORY__IMMI8: return NULL; |
511 | case _PARTIALSUBTYPECHECK_RSI_REGP_RAX_REGP: return NULL; |
512 | case _LOADVECTOR_MEMORY_: return NULL; |
513 | case _BINARY_CMPOP_VCMPPD_IMMI8: return NULL; |
514 | case _BINARY_LEGVECY_LEGVECY: return NULL; |
515 | case _BINARY_VECX_VECX: return NULL; |
516 | case _BINARY_VECX__LOADVECTOR_MEMORY_: return NULL; |
517 | case _BINARY_VECY_VECY: return NULL; |
518 | case _BINARY_VECY__LOADVECTOR_MEMORY_: return NULL; |
519 | case _BINARY_VECZ_VECZ: return NULL; |
520 | case _BINARY_VECZ__LOADVECTOR_MEMORY_: return NULL; |
521 | case _MULADDVS2VI_VECD_VECD: return NULL; |
522 | case _MULADDVS2VI_VECX_VECX: return NULL; |
523 | case _MULADDVS2VI_VECY_VECY: return NULL; |
524 | case _MULADDVS2VI_VECZ_VECZ: return NULL; |
525 | case _BINARY_MEMORY_RREGP: return NULL; |
526 | |
527 | default: |
528 | fprintf(stderr, "Default MachOper Generator invoked for: \n" ); |
529 | fprintf(stderr, " opcode = %d\n" , opcode); |
530 | break; |
531 | } |
532 | return NULL; |
533 | }; |
534 | |
535 | |
536 | //------------------------- MachNode Generator --------------- |
537 | // A switch statement on the dense-packed user-defined type system |
538 | // that invokes 'new' on the corresponding class constructor. |
539 | |
540 | MachNode *State::MachNodeGenerator(int opcode){ |
541 | switch(opcode) { |
542 | case loadB_rule: { |
543 | loadBNode *node = new loadBNode(); |
544 | return node; |
545 | } |
546 | case loadB2L_rule: { |
547 | loadB2LNode *node = new loadB2LNode(); |
548 | return node; |
549 | } |
550 | case loadUB_rule: { |
551 | loadUBNode *node = new loadUBNode(); |
552 | return node; |
553 | } |
554 | case loadUB2L_rule: { |
555 | loadUB2LNode *node = new loadUB2LNode(); |
556 | return node; |
557 | } |
558 | case loadUB2L_immI_rule: { |
559 | loadUB2L_immINode *node = new loadUB2L_immINode(); |
560 | return node; |
561 | } |
562 | case loadS_rule: { |
563 | loadSNode *node = new loadSNode(); |
564 | return node; |
565 | } |
566 | case loadS2B_rule: { |
567 | loadS2BNode *node = new loadS2BNode(); |
568 | return node; |
569 | } |
570 | case loadS2L_rule: { |
571 | loadS2LNode *node = new loadS2LNode(); |
572 | return node; |
573 | } |
574 | case loadUS_rule: { |
575 | loadUSNode *node = new loadUSNode(); |
576 | return node; |
577 | } |
578 | case loadUS2B_rule: { |
579 | loadUS2BNode *node = new loadUS2BNode(); |
580 | return node; |
581 | } |
582 | case loadUS2L_rule: { |
583 | loadUS2LNode *node = new loadUS2LNode(); |
584 | return node; |
585 | } |
586 | case loadUS2L_immI_255_rule: { |
587 | loadUS2L_immI_255Node *node = new loadUS2L_immI_255Node(); |
588 | return node; |
589 | } |
590 | case loadUS2L_immI_rule: { |
591 | loadUS2L_immINode *node = new loadUS2L_immINode(); |
592 | return node; |
593 | } |
594 | case loadI_rule: { |
595 | loadINode *node = new loadINode(); |
596 | return node; |
597 | } |
598 | case loadI2B_rule: { |
599 | loadI2BNode *node = new loadI2BNode(); |
600 | return node; |
601 | } |
602 | case loadI2UB_rule: { |
603 | loadI2UBNode *node = new loadI2UBNode(); |
604 | return node; |
605 | } |
606 | case loadI2S_rule: { |
607 | loadI2SNode *node = new loadI2SNode(); |
608 | return node; |
609 | } |
610 | case loadI2US_rule: { |
611 | loadI2USNode *node = new loadI2USNode(); |
612 | return node; |
613 | } |
614 | case loadI2L_rule: { |
615 | loadI2LNode *node = new loadI2LNode(); |
616 | return node; |
617 | } |
618 | case loadI2L_immI_255_rule: { |
619 | loadI2L_immI_255Node *node = new loadI2L_immI_255Node(); |
620 | return node; |
621 | } |
622 | case loadI2L_immI_65535_rule: { |
623 | loadI2L_immI_65535Node *node = new loadI2L_immI_65535Node(); |
624 | return node; |
625 | } |
626 | case loadI2L_immU31_rule: { |
627 | loadI2L_immU31Node *node = new loadI2L_immU31Node(); |
628 | return node; |
629 | } |
630 | case loadUI2L_rule: { |
631 | loadUI2LNode *node = new loadUI2LNode(); |
632 | return node; |
633 | } |
634 | case loadL_rule: { |
635 | loadLNode *node = new loadLNode(); |
636 | return node; |
637 | } |
638 | case loadRange_rule: { |
639 | loadRangeNode *node = new loadRangeNode(); |
640 | return node; |
641 | } |
642 | case loadP_rule: { |
643 | loadPNode *node = new loadPNode(); |
644 | node->_bottom_type = _leaf->bottom_type(); |
645 | return node; |
646 | } |
647 | case loadN_rule: { |
648 | loadNNode *node = new loadNNode(); |
649 | node->_bottom_type = _leaf->bottom_type(); |
650 | return node; |
651 | } |
652 | case loadKlass_rule: { |
653 | loadKlassNode *node = new loadKlassNode(); |
654 | node->_bottom_type = _leaf->bottom_type(); |
655 | return node; |
656 | } |
657 | case loadNKlass_rule: { |
658 | loadNKlassNode *node = new loadNKlassNode(); |
659 | node->_bottom_type = _leaf->bottom_type(); |
660 | return node; |
661 | } |
662 | case loadF_rule: { |
663 | loadFNode *node = new loadFNode(); |
664 | return node; |
665 | } |
666 | case MoveF2VL_rule: { |
667 | MoveF2VLNode *node = new MoveF2VLNode(); |
668 | return node; |
669 | } |
670 | case MoveF2LEG_rule: { |
671 | MoveF2LEGNode *node = new MoveF2LEGNode(); |
672 | return node; |
673 | } |
674 | case MoveVL2F_rule: { |
675 | MoveVL2FNode *node = new MoveVL2FNode(); |
676 | return node; |
677 | } |
678 | case MoveLEG2F_rule: { |
679 | MoveLEG2FNode *node = new MoveLEG2FNode(); |
680 | return node; |
681 | } |
682 | case loadD_partial_rule: { |
683 | loadD_partialNode *node = new loadD_partialNode(); |
684 | return node; |
685 | } |
686 | case loadD_rule: { |
687 | loadDNode *node = new loadDNode(); |
688 | return node; |
689 | } |
690 | case MoveD2VL_rule: { |
691 | MoveD2VLNode *node = new MoveD2VLNode(); |
692 | return node; |
693 | } |
694 | case MoveD2LEG_rule: { |
695 | MoveD2LEGNode *node = new MoveD2LEGNode(); |
696 | return node; |
697 | } |
698 | case MoveVL2D_rule: { |
699 | MoveVL2DNode *node = new MoveVL2DNode(); |
700 | return node; |
701 | } |
702 | case MoveLEG2D_rule: { |
703 | MoveLEG2DNode *node = new MoveLEG2DNode(); |
704 | return node; |
705 | } |
706 | case maxF_reg_rule: { |
707 | maxF_regNode *node = new maxF_regNode(); |
708 | node->set_opnd_array(3, MachOperGenerator(LEGREGF)); |
709 | node->set_opnd_array(4, MachOperGenerator(LEGREGF)); |
710 | node->set_opnd_array(5, MachOperGenerator(LEGREGF)); |
711 | return node; |
712 | } |
713 | case maxF_reduction_reg_rule: { |
714 | maxF_reduction_regNode *node = new maxF_reduction_regNode(); |
715 | node->set_opnd_array(3, MachOperGenerator(LEGREGF)); |
716 | node->set_opnd_array(4, MachOperGenerator(RREGI)); |
717 | return node; |
718 | } |
719 | case maxD_reg_rule: { |
720 | maxD_regNode *node = new maxD_regNode(); |
721 | node->set_opnd_array(3, MachOperGenerator(LEGREGD)); |
722 | node->set_opnd_array(4, MachOperGenerator(LEGREGD)); |
723 | node->set_opnd_array(5, MachOperGenerator(LEGREGD)); |
724 | return node; |
725 | } |
726 | case maxD_reduction_reg_rule: { |
727 | maxD_reduction_regNode *node = new maxD_reduction_regNode(); |
728 | node->set_opnd_array(3, MachOperGenerator(LEGREGD)); |
729 | node->set_opnd_array(4, MachOperGenerator(RREGL)); |
730 | return node; |
731 | } |
732 | case minF_reg_rule: { |
733 | minF_regNode *node = new minF_regNode(); |
734 | node->set_opnd_array(3, MachOperGenerator(LEGREGF)); |
735 | node->set_opnd_array(4, MachOperGenerator(LEGREGF)); |
736 | node->set_opnd_array(5, MachOperGenerator(LEGREGF)); |
737 | return node; |
738 | } |
739 | case minF_reduction_reg_rule: { |
740 | minF_reduction_regNode *node = new minF_reduction_regNode(); |
741 | node->set_opnd_array(3, MachOperGenerator(LEGREGF)); |
742 | node->set_opnd_array(4, MachOperGenerator(RREGI)); |
743 | return node; |
744 | } |
745 | case minD_reg_rule: { |
746 | minD_regNode *node = new minD_regNode(); |
747 | node->set_opnd_array(3, MachOperGenerator(LEGREGD)); |
748 | node->set_opnd_array(4, MachOperGenerator(LEGREGD)); |
749 | node->set_opnd_array(5, MachOperGenerator(LEGREGD)); |
750 | return node; |
751 | } |
752 | case minD_reduction_reg_rule: { |
753 | minD_reduction_regNode *node = new minD_reduction_regNode(); |
754 | node->set_opnd_array(3, MachOperGenerator(LEGREGD)); |
755 | node->set_opnd_array(4, MachOperGenerator(RREGL)); |
756 | return node; |
757 | } |
758 | case leaP8_rule: { |
759 | leaP8Node *node = new leaP8Node(); |
760 | node->_bottom_type = _leaf->bottom_type(); |
761 | return node; |
762 | } |
763 | case leaP32_rule: { |
764 | leaP32Node *node = new leaP32Node(); |
765 | node->_bottom_type = _leaf->bottom_type(); |
766 | return node; |
767 | } |
768 | case leaPIdxOff_rule: { |
769 | leaPIdxOffNode *node = new leaPIdxOffNode(); |
770 | node->_bottom_type = _leaf->bottom_type(); |
771 | return node; |
772 | } |
773 | case leaPIdxScale_rule: { |
774 | leaPIdxScaleNode *node = new leaPIdxScaleNode(); |
775 | node->_bottom_type = _leaf->bottom_type(); |
776 | return node; |
777 | } |
778 | case leaPPosIdxScale_rule: { |
779 | leaPPosIdxScaleNode *node = new leaPPosIdxScaleNode(); |
780 | node->_bottom_type = _leaf->bottom_type(); |
781 | return node; |
782 | } |
783 | case leaPIdxScaleOff_rule: { |
784 | leaPIdxScaleOffNode *node = new leaPIdxScaleOffNode(); |
785 | node->_bottom_type = _leaf->bottom_type(); |
786 | return node; |
787 | } |
788 | case leaPPosIdxOff_rule: { |
789 | leaPPosIdxOffNode *node = new leaPPosIdxOffNode(); |
790 | node->_bottom_type = _leaf->bottom_type(); |
791 | return node; |
792 | } |
793 | case leaPPosIdxScaleOff_rule: { |
794 | leaPPosIdxScaleOffNode *node = new leaPPosIdxScaleOffNode(); |
795 | node->_bottom_type = _leaf->bottom_type(); |
796 | return node; |
797 | } |
798 | case leaPCompressedOopOffset_rule: { |
799 | leaPCompressedOopOffsetNode *node = new leaPCompressedOopOffsetNode(); |
800 | node->_bottom_type = _leaf->bottom_type(); |
801 | return node; |
802 | } |
803 | case leaP8Narrow_rule: { |
804 | leaP8NarrowNode *node = new leaP8NarrowNode(); |
805 | node->_bottom_type = _leaf->bottom_type(); |
806 | return node; |
807 | } |
808 | case leaP32Narrow_rule: { |
809 | leaP32NarrowNode *node = new leaP32NarrowNode(); |
810 | node->_bottom_type = _leaf->bottom_type(); |
811 | return node; |
812 | } |
813 | case leaPIdxOffNarrow_rule: { |
814 | leaPIdxOffNarrowNode *node = new leaPIdxOffNarrowNode(); |
815 | node->_bottom_type = _leaf->bottom_type(); |
816 | return node; |
817 | } |
818 | case leaPIdxScaleNarrow_rule: { |
819 | leaPIdxScaleNarrowNode *node = new leaPIdxScaleNarrowNode(); |
820 | node->_bottom_type = _leaf->bottom_type(); |
821 | return node; |
822 | } |
823 | case leaPIdxScaleOffNarrow_rule: { |
824 | leaPIdxScaleOffNarrowNode *node = new leaPIdxScaleOffNarrowNode(); |
825 | node->_bottom_type = _leaf->bottom_type(); |
826 | return node; |
827 | } |
828 | case leaPPosIdxOffNarrow_rule: { |
829 | leaPPosIdxOffNarrowNode *node = new leaPPosIdxOffNarrowNode(); |
830 | node->_bottom_type = _leaf->bottom_type(); |
831 | return node; |
832 | } |
833 | case leaPPosIdxScaleOffNarrow_rule: { |
834 | leaPPosIdxScaleOffNarrowNode *node = new leaPPosIdxScaleOffNarrowNode(); |
835 | node->_bottom_type = _leaf->bottom_type(); |
836 | return node; |
837 | } |
838 | case loadConI_rule: { |
839 | loadConINode *node = new loadConINode(); |
840 | node->_opnd_array[1] = new immIOper(_leaf->get_int() ); |
841 | return node; |
842 | } |
843 | case loadConI0_rule: { |
844 | loadConI0Node *node = new loadConI0Node(); |
845 | return node; |
846 | } |
847 | case loadConL_rule: { |
848 | loadConLNode *node = new loadConLNode(); |
849 | node->_opnd_array[1] = new immLOper(_leaf->get_long() ); |
850 | return node; |
851 | } |
852 | case loadConL0_rule: { |
853 | loadConL0Node *node = new loadConL0Node(); |
854 | return node; |
855 | } |
856 | case loadConUL32_rule: { |
857 | loadConUL32Node *node = new loadConUL32Node(); |
858 | node->_opnd_array[1] = new immUL32Oper(_leaf->get_long() ); |
859 | return node; |
860 | } |
861 | case loadConL32_rule: { |
862 | loadConL32Node *node = new loadConL32Node(); |
863 | node->_opnd_array[1] = new immL32Oper(_leaf->get_long() ); |
864 | return node; |
865 | } |
866 | case loadConP_rule: { |
867 | loadConPNode *node = new loadConPNode(); |
868 | node->_opnd_array[1] = new immPOper(_leaf->bottom_type()->is_ptr() ); |
869 | return node; |
870 | } |
871 | case loadConP0_rule: { |
872 | loadConP0Node *node = new loadConP0Node(); |
873 | return node; |
874 | } |
875 | case loadConP31_rule: { |
876 | loadConP31Node *node = new loadConP31Node(); |
877 | return node; |
878 | } |
879 | case loadConF_rule: { |
880 | loadConFNode *node = new loadConFNode(); |
881 | node->_opnd_array[1] = new immFOper(_leaf->getf() ); |
882 | node->_bottom_type = _leaf->bottom_type(); |
883 | return node; |
884 | } |
885 | case loadConN0_rule: { |
886 | loadConN0Node *node = new loadConN0Node(); |
887 | return node; |
888 | } |
889 | case loadConN_rule: { |
890 | loadConNNode *node = new loadConNNode(); |
891 | node->_opnd_array[1] = new immNOper(_leaf->bottom_type()->is_narrowoop() ); |
892 | return node; |
893 | } |
894 | case loadConNKlass_rule: { |
895 | loadConNKlassNode *node = new loadConNKlassNode(); |
896 | node->_opnd_array[1] = new immNKlassOper(_leaf->bottom_type()->is_narrowklass() ); |
897 | return node; |
898 | } |
899 | case loadConF0_rule: { |
900 | loadConF0Node *node = new loadConF0Node(); |
901 | node->_opnd_array[1] = new immF0Oper(_leaf->getf() ); |
902 | return node; |
903 | } |
904 | case loadConD_rule: { |
905 | loadConDNode *node = new loadConDNode(); |
906 | node->_opnd_array[1] = new immDOper(_leaf->getd() ); |
907 | node->_bottom_type = _leaf->bottom_type(); |
908 | return node; |
909 | } |
910 | case loadConD0_rule: { |
911 | loadConD0Node *node = new loadConD0Node(); |
912 | node->_opnd_array[1] = new immD0Oper(_leaf->getd() ); |
913 | return node; |
914 | } |
915 | case loadSSI_rule: { |
916 | loadSSINode *node = new loadSSINode(); |
917 | return node; |
918 | } |
919 | case loadSSL_rule: { |
920 | loadSSLNode *node = new loadSSLNode(); |
921 | return node; |
922 | } |
923 | case loadSSP_rule: { |
924 | loadSSPNode *node = new loadSSPNode(); |
925 | return node; |
926 | } |
927 | case loadSSF_rule: { |
928 | loadSSFNode *node = new loadSSFNode(); |
929 | return node; |
930 | } |
931 | case loadSSD_rule: { |
932 | loadSSDNode *node = new loadSSDNode(); |
933 | return node; |
934 | } |
935 | case prefetchAlloc_rule: { |
936 | prefetchAllocNode *node = new prefetchAllocNode(); |
937 | return node; |
938 | } |
939 | case prefetchAllocNTA_rule: { |
940 | prefetchAllocNTANode *node = new prefetchAllocNTANode(); |
941 | return node; |
942 | } |
943 | case prefetchAllocT0_rule: { |
944 | prefetchAllocT0Node *node = new prefetchAllocT0Node(); |
945 | return node; |
946 | } |
947 | case prefetchAllocT2_rule: { |
948 | prefetchAllocT2Node *node = new prefetchAllocT2Node(); |
949 | return node; |
950 | } |
951 | case storeB_rule: { |
952 | storeBNode *node = new storeBNode(); |
953 | node->_bottom_type = _leaf->bottom_type(); |
954 | return node; |
955 | } |
956 | case storeC_rule: { |
957 | storeCNode *node = new storeCNode(); |
958 | node->_bottom_type = _leaf->bottom_type(); |
959 | return node; |
960 | } |
961 | case storeI_rule: { |
962 | storeINode *node = new storeINode(); |
963 | node->_bottom_type = _leaf->bottom_type(); |
964 | return node; |
965 | } |
966 | case storeL_rule: { |
967 | storeLNode *node = new storeLNode(); |
968 | node->_bottom_type = _leaf->bottom_type(); |
969 | return node; |
970 | } |
971 | case storeP_rule: { |
972 | storePNode *node = new storePNode(); |
973 | node->_bottom_type = _leaf->bottom_type(); |
974 | return node; |
975 | } |
976 | case storeImmP0_rule: { |
977 | storeImmP0Node *node = new storeImmP0Node(); |
978 | node->_bottom_type = _leaf->bottom_type(); |
979 | return node; |
980 | } |
981 | case storeImmP_rule: { |
982 | storeImmPNode *node = new storeImmPNode(); |
983 | node->_bottom_type = _leaf->bottom_type(); |
984 | return node; |
985 | } |
986 | case storeN_rule: { |
987 | storeNNode *node = new storeNNode(); |
988 | node->_bottom_type = _leaf->bottom_type(); |
989 | return node; |
990 | } |
991 | case storeNKlass_rule: { |
992 | storeNKlassNode *node = new storeNKlassNode(); |
993 | node->_bottom_type = _leaf->bottom_type(); |
994 | return node; |
995 | } |
996 | case storeImmN0_rule: { |
997 | storeImmN0Node *node = new storeImmN0Node(); |
998 | node->_bottom_type = _leaf->bottom_type(); |
999 | return node; |
1000 | } |
1001 | case storeImmN_rule: { |
1002 | storeImmNNode *node = new storeImmNNode(); |
1003 | node->_bottom_type = _leaf->bottom_type(); |
1004 | return node; |
1005 | } |
1006 | case storeImmNKlass_rule: { |
1007 | storeImmNKlassNode *node = new storeImmNKlassNode(); |
1008 | node->_bottom_type = _leaf->bottom_type(); |
1009 | return node; |
1010 | } |
1011 | case storeImmI0_rule: { |
1012 | storeImmI0Node *node = new storeImmI0Node(); |
1013 | node->_bottom_type = _leaf->bottom_type(); |
1014 | return node; |
1015 | } |
1016 | case storeImmI_rule: { |
1017 | storeImmINode *node = new storeImmINode(); |
1018 | node->_bottom_type = _leaf->bottom_type(); |
1019 | return node; |
1020 | } |
1021 | case storeImmL0_rule: { |
1022 | storeImmL0Node *node = new storeImmL0Node(); |
1023 | node->_bottom_type = _leaf->bottom_type(); |
1024 | return node; |
1025 | } |
1026 | case storeImmL_rule: { |
1027 | storeImmLNode *node = new storeImmLNode(); |
1028 | node->_bottom_type = _leaf->bottom_type(); |
1029 | return node; |
1030 | } |
1031 | case storeImmC0_rule: { |
1032 | storeImmC0Node *node = new storeImmC0Node(); |
1033 | node->_bottom_type = _leaf->bottom_type(); |
1034 | return node; |
1035 | } |
1036 | case storeImmI16_rule: { |
1037 | storeImmI16Node *node = new storeImmI16Node(); |
1038 | node->_bottom_type = _leaf->bottom_type(); |
1039 | return node; |
1040 | } |
1041 | case storeImmB0_rule: { |
1042 | storeImmB0Node *node = new storeImmB0Node(); |
1043 | node->_bottom_type = _leaf->bottom_type(); |
1044 | return node; |
1045 | } |
1046 | case storeImmB_rule: { |
1047 | storeImmBNode *node = new storeImmBNode(); |
1048 | node->_bottom_type = _leaf->bottom_type(); |
1049 | return node; |
1050 | } |
1051 | case storeImmCM0_reg_rule: { |
1052 | storeImmCM0_regNode *node = new storeImmCM0_regNode(); |
1053 | node->_bottom_type = _leaf->bottom_type(); |
1054 | return node; |
1055 | } |
1056 | case storeImmCM0_rule: { |
1057 | storeImmCM0Node *node = new storeImmCM0Node(); |
1058 | node->_bottom_type = _leaf->bottom_type(); |
1059 | return node; |
1060 | } |
1061 | case storeF_rule: { |
1062 | storeFNode *node = new storeFNode(); |
1063 | node->_bottom_type = _leaf->bottom_type(); |
1064 | return node; |
1065 | } |
1066 | case storeF0_rule: { |
1067 | storeF0Node *node = new storeF0Node(); |
1068 | node->_bottom_type = _leaf->bottom_type(); |
1069 | return node; |
1070 | } |
1071 | case storeF_imm_rule: { |
1072 | storeF_immNode *node = new storeF_immNode(); |
1073 | node->_bottom_type = _leaf->bottom_type(); |
1074 | return node; |
1075 | } |
1076 | case storeD_rule: { |
1077 | storeDNode *node = new storeDNode(); |
1078 | node->_bottom_type = _leaf->bottom_type(); |
1079 | return node; |
1080 | } |
1081 | case storeD0_imm_rule: { |
1082 | storeD0_immNode *node = new storeD0_immNode(); |
1083 | node->_bottom_type = _leaf->bottom_type(); |
1084 | return node; |
1085 | } |
1086 | case storeD0_rule: { |
1087 | storeD0Node *node = new storeD0Node(); |
1088 | node->_bottom_type = _leaf->bottom_type(); |
1089 | return node; |
1090 | } |
1091 | case storeSSI_rule: { |
1092 | storeSSINode *node = new storeSSINode(); |
1093 | return node; |
1094 | } |
1095 | case storeSSL_rule: { |
1096 | storeSSLNode *node = new storeSSLNode(); |
1097 | return node; |
1098 | } |
1099 | case storeSSP_rule: { |
1100 | storeSSPNode *node = new storeSSPNode(); |
1101 | return node; |
1102 | } |
1103 | case storeSSF_rule: { |
1104 | storeSSFNode *node = new storeSSFNode(); |
1105 | return node; |
1106 | } |
1107 | case storeSSD_rule: { |
1108 | storeSSDNode *node = new storeSSDNode(); |
1109 | return node; |
1110 | } |
1111 | case bytes_reverse_int_rule: { |
1112 | bytes_reverse_intNode *node = new bytes_reverse_intNode(); |
1113 | return node; |
1114 | } |
1115 | case bytes_reverse_long_rule: { |
1116 | bytes_reverse_longNode *node = new bytes_reverse_longNode(); |
1117 | return node; |
1118 | } |
1119 | case bytes_reverse_unsigned_short_rule: { |
1120 | bytes_reverse_unsigned_shortNode *node = new bytes_reverse_unsigned_shortNode(); |
1121 | return node; |
1122 | } |
1123 | case bytes_reverse_short_rule: { |
1124 | bytes_reverse_shortNode *node = new bytes_reverse_shortNode(); |
1125 | return node; |
1126 | } |
1127 | case countLeadingZerosI_rule: { |
1128 | countLeadingZerosINode *node = new countLeadingZerosINode(); |
1129 | return node; |
1130 | } |
1131 | case countLeadingZerosI_bsr_rule: { |
1132 | countLeadingZerosI_bsrNode *node = new countLeadingZerosI_bsrNode(); |
1133 | return node; |
1134 | } |
1135 | case countLeadingZerosL_rule: { |
1136 | countLeadingZerosLNode *node = new countLeadingZerosLNode(); |
1137 | return node; |
1138 | } |
1139 | case countLeadingZerosL_bsr_rule: { |
1140 | countLeadingZerosL_bsrNode *node = new countLeadingZerosL_bsrNode(); |
1141 | return node; |
1142 | } |
1143 | case countTrailingZerosI_rule: { |
1144 | countTrailingZerosINode *node = new countTrailingZerosINode(); |
1145 | return node; |
1146 | } |
1147 | case countTrailingZerosI_bsf_rule: { |
1148 | countTrailingZerosI_bsfNode *node = new countTrailingZerosI_bsfNode(); |
1149 | return node; |
1150 | } |
1151 | case countTrailingZerosL_rule: { |
1152 | countTrailingZerosLNode *node = new countTrailingZerosLNode(); |
1153 | return node; |
1154 | } |
1155 | case countTrailingZerosL_bsf_rule: { |
1156 | countTrailingZerosL_bsfNode *node = new countTrailingZerosL_bsfNode(); |
1157 | return node; |
1158 | } |
1159 | case popCountI_rule: { |
1160 | popCountINode *node = new popCountINode(); |
1161 | return node; |
1162 | } |
1163 | case popCountI_mem_rule: { |
1164 | popCountI_memNode *node = new popCountI_memNode(); |
1165 | return node; |
1166 | } |
1167 | case popCountL_rule: { |
1168 | popCountLNode *node = new popCountLNode(); |
1169 | return node; |
1170 | } |
1171 | case popCountL_mem_rule: { |
1172 | popCountL_memNode *node = new popCountL_memNode(); |
1173 | return node; |
1174 | } |
1175 | case membar_acquire_rule: { |
1176 | membar_acquireNode *node = new membar_acquireNode(); |
1177 | return node; |
1178 | } |
1179 | case membar_acquire_0_rule: { |
1180 | membar_acquire_0Node *node = new membar_acquire_0Node(); |
1181 | return node; |
1182 | } |
1183 | case membar_acquire_lock_rule: { |
1184 | membar_acquire_lockNode *node = new membar_acquire_lockNode(); |
1185 | return node; |
1186 | } |
1187 | case membar_release_rule: { |
1188 | membar_releaseNode *node = new membar_releaseNode(); |
1189 | return node; |
1190 | } |
1191 | case membar_release_0_rule: { |
1192 | membar_release_0Node *node = new membar_release_0Node(); |
1193 | return node; |
1194 | } |
1195 | case membar_release_lock_rule: { |
1196 | membar_release_lockNode *node = new membar_release_lockNode(); |
1197 | return node; |
1198 | } |
1199 | case membar_volatile_rule: { |
1200 | membar_volatileNode *node = new membar_volatileNode(); |
1201 | node->set_opnd_array(1, MachOperGenerator(RFLAGSREG)); |
1202 | return node; |
1203 | } |
1204 | case unnecessary_membar_volatile_rule: { |
1205 | unnecessary_membar_volatileNode *node = new unnecessary_membar_volatileNode(); |
1206 | return node; |
1207 | } |
1208 | case membar_storestore_rule: { |
1209 | membar_storestoreNode *node = new membar_storestoreNode(); |
1210 | return node; |
1211 | } |
1212 | case castX2P_rule: { |
1213 | castX2PNode *node = new castX2PNode(); |
1214 | node->_bottom_type = _leaf->bottom_type(); |
1215 | return node; |
1216 | } |
1217 | case castP2X_rule: { |
1218 | castP2XNode *node = new castP2XNode(); |
1219 | return node; |
1220 | } |
1221 | case convP2I_rule: { |
1222 | convP2INode *node = new convP2INode(); |
1223 | return node; |
1224 | } |
1225 | case convN2I_rule: { |
1226 | convN2INode *node = new convN2INode(); |
1227 | return node; |
1228 | } |
1229 | case encodeHeapOop_rule: { |
1230 | encodeHeapOopNode *node = new encodeHeapOopNode(); |
1231 | node->_bottom_type = _leaf->bottom_type(); |
1232 | return node; |
1233 | } |
1234 | case encodeHeapOop_not_null_rule: { |
1235 | encodeHeapOop_not_nullNode *node = new encodeHeapOop_not_nullNode(); |
1236 | node->_bottom_type = _leaf->bottom_type(); |
1237 | return node; |
1238 | } |
1239 | case decodeHeapOop_rule: { |
1240 | decodeHeapOopNode *node = new decodeHeapOopNode(); |
1241 | node->_bottom_type = _leaf->bottom_type(); |
1242 | return node; |
1243 | } |
1244 | case decodeHeapOop_not_null_rule: { |
1245 | decodeHeapOop_not_nullNode *node = new decodeHeapOop_not_nullNode(); |
1246 | node->_bottom_type = _leaf->bottom_type(); |
1247 | return node; |
1248 | } |
1249 | case encodeKlass_not_null_rule: { |
1250 | encodeKlass_not_nullNode *node = new encodeKlass_not_nullNode(); |
1251 | node->_bottom_type = _leaf->bottom_type(); |
1252 | return node; |
1253 | } |
1254 | case decodeKlass_not_null_rule: { |
1255 | decodeKlass_not_nullNode *node = new decodeKlass_not_nullNode(); |
1256 | node->_bottom_type = _leaf->bottom_type(); |
1257 | return node; |
1258 | } |
1259 | case jumpXtnd_offset_rule: { |
1260 | jumpXtnd_offsetNode *node = new jumpXtnd_offsetNode(); |
1261 | node->set_opnd_array(3, MachOperGenerator(RREGI)); |
1262 | node->_bottom_type = _leaf->bottom_type(); |
1263 | node->_probs = _leaf->as_Jump()->_probs; |
1264 | return node; |
1265 | } |
1266 | case jumpXtnd_addr_rule: { |
1267 | jumpXtnd_addrNode *node = new jumpXtnd_addrNode(); |
1268 | node->set_opnd_array(4, MachOperGenerator(RREGI)); |
1269 | node->_bottom_type = _leaf->bottom_type(); |
1270 | node->_probs = _leaf->as_Jump()->_probs; |
1271 | return node; |
1272 | } |
1273 | case jumpXtnd_rule: { |
1274 | jumpXtndNode *node = new jumpXtndNode(); |
1275 | node->set_opnd_array(2, MachOperGenerator(RREGI)); |
1276 | node->_bottom_type = _leaf->bottom_type(); |
1277 | node->_probs = _leaf->as_Jump()->_probs; |
1278 | return node; |
1279 | } |
1280 | case cmovI_reg_rule: { |
1281 | cmovI_regNode *node = new cmovI_regNode(); |
1282 | return node; |
1283 | } |
1284 | case cmovI_regU_rule: { |
1285 | cmovI_regUNode *node = new cmovI_regUNode(); |
1286 | return node; |
1287 | } |
1288 | case cmovI_regUCF_rule: { |
1289 | cmovI_regUCFNode *node = new cmovI_regUCFNode(); |
1290 | return node; |
1291 | } |
1292 | case cmovI_mem_rule: { |
1293 | cmovI_memNode *node = new cmovI_memNode(); |
1294 | return node; |
1295 | } |
1296 | case cmovI_memU_rule: { |
1297 | cmovI_memUNode *node = new cmovI_memUNode(); |
1298 | return node; |
1299 | } |
1300 | case cmovI_memUCF_rule: { |
1301 | cmovI_memUCFNode *node = new cmovI_memUCFNode(); |
1302 | return node; |
1303 | } |
1304 | case cmovN_reg_rule: { |
1305 | cmovN_regNode *node = new cmovN_regNode(); |
1306 | return node; |
1307 | } |
1308 | case cmovN_regU_rule: { |
1309 | cmovN_regUNode *node = new cmovN_regUNode(); |
1310 | return node; |
1311 | } |
1312 | case cmovN_regUCF_rule: { |
1313 | cmovN_regUCFNode *node = new cmovN_regUCFNode(); |
1314 | return node; |
1315 | } |
1316 | case cmovP_reg_rule: { |
1317 | cmovP_regNode *node = new cmovP_regNode(); |
1318 | return node; |
1319 | } |
1320 | case cmovP_regU_rule: { |
1321 | cmovP_regUNode *node = new cmovP_regUNode(); |
1322 | return node; |
1323 | } |
1324 | case cmovP_regUCF_rule: { |
1325 | cmovP_regUCFNode *node = new cmovP_regUCFNode(); |
1326 | return node; |
1327 | } |
1328 | case cmovL_reg_rule: { |
1329 | cmovL_regNode *node = new cmovL_regNode(); |
1330 | return node; |
1331 | } |
1332 | case cmovL_mem_rule: { |
1333 | cmovL_memNode *node = new cmovL_memNode(); |
1334 | return node; |
1335 | } |
1336 | case cmovL_regU_rule: { |
1337 | cmovL_regUNode *node = new cmovL_regUNode(); |
1338 | return node; |
1339 | } |
1340 | case cmovL_regUCF_rule: { |
1341 | cmovL_regUCFNode *node = new cmovL_regUCFNode(); |
1342 | return node; |
1343 | } |
1344 | case cmovL_memU_rule: { |
1345 | cmovL_memUNode *node = new cmovL_memUNode(); |
1346 | return node; |
1347 | } |
1348 | case cmovL_memUCF_rule: { |
1349 | cmovL_memUCFNode *node = new cmovL_memUCFNode(); |
1350 | return node; |
1351 | } |
1352 | case cmovF_reg_rule: { |
1353 | cmovF_regNode *node = new cmovF_regNode(); |
1354 | return node; |
1355 | } |
1356 | case cmovF_regU_rule: { |
1357 | cmovF_regUNode *node = new cmovF_regUNode(); |
1358 | return node; |
1359 | } |
1360 | case cmovF_regUCF_rule: { |
1361 | cmovF_regUCFNode *node = new cmovF_regUCFNode(); |
1362 | return node; |
1363 | } |
1364 | case cmovD_reg_rule: { |
1365 | cmovD_regNode *node = new cmovD_regNode(); |
1366 | return node; |
1367 | } |
1368 | case cmovD_regU_rule: { |
1369 | cmovD_regUNode *node = new cmovD_regUNode(); |
1370 | return node; |
1371 | } |
1372 | case cmovD_regUCF_rule: { |
1373 | cmovD_regUCFNode *node = new cmovD_regUCFNode(); |
1374 | return node; |
1375 | } |
1376 | case addI_rReg_rule: { |
1377 | addI_rRegNode *node = new addI_rRegNode(); |
1378 | return node; |
1379 | } |
1380 | case addI_rReg_imm_rule: { |
1381 | addI_rReg_immNode *node = new addI_rReg_immNode(); |
1382 | return node; |
1383 | } |
1384 | case addI_rReg_mem_rule: { |
1385 | addI_rReg_memNode *node = new addI_rReg_memNode(); |
1386 | return node; |
1387 | } |
1388 | case addI_rReg_mem_0_rule: { |
1389 | addI_rReg_mem_0Node *node = new addI_rReg_mem_0Node(); |
1390 | return node; |
1391 | } |
1392 | case addI_mem_rReg_rule: { |
1393 | addI_mem_rRegNode *node = new addI_mem_rRegNode(); |
1394 | node->_bottom_type = _leaf->bottom_type(); |
1395 | return node; |
1396 | } |
1397 | case addI_mem_rReg_0_rule: { |
1398 | addI_mem_rReg_0Node *node = new addI_mem_rReg_0Node(); |
1399 | node->_bottom_type = _leaf->bottom_type(); |
1400 | return node; |
1401 | } |
1402 | case addI_mem_imm_rule: { |
1403 | addI_mem_immNode *node = new addI_mem_immNode(); |
1404 | node->_bottom_type = _leaf->bottom_type(); |
1405 | return node; |
1406 | } |
1407 | case incI_rReg_rule: { |
1408 | incI_rRegNode *node = new incI_rRegNode(); |
1409 | return node; |
1410 | } |
1411 | case incI_mem_rule: { |
1412 | incI_memNode *node = new incI_memNode(); |
1413 | node->_bottom_type = _leaf->bottom_type(); |
1414 | return node; |
1415 | } |
1416 | case decI_rReg_rule: { |
1417 | decI_rRegNode *node = new decI_rRegNode(); |
1418 | return node; |
1419 | } |
1420 | case decI_mem_rule: { |
1421 | decI_memNode *node = new decI_memNode(); |
1422 | node->_bottom_type = _leaf->bottom_type(); |
1423 | return node; |
1424 | } |
1425 | case leaI_rReg_immI_rule: { |
1426 | leaI_rReg_immINode *node = new leaI_rReg_immINode(); |
1427 | return node; |
1428 | } |
1429 | case addL_rReg_rule: { |
1430 | addL_rRegNode *node = new addL_rRegNode(); |
1431 | return node; |
1432 | } |
1433 | case addL_rReg_imm_rule: { |
1434 | addL_rReg_immNode *node = new addL_rReg_immNode(); |
1435 | return node; |
1436 | } |
1437 | case addL_rReg_mem_rule: { |
1438 | addL_rReg_memNode *node = new addL_rReg_memNode(); |
1439 | return node; |
1440 | } |
1441 | case addL_rReg_mem_0_rule: { |
1442 | addL_rReg_mem_0Node *node = new addL_rReg_mem_0Node(); |
1443 | return node; |
1444 | } |
1445 | case addL_mem_rReg_rule: { |
1446 | addL_mem_rRegNode *node = new addL_mem_rRegNode(); |
1447 | node->_bottom_type = _leaf->bottom_type(); |
1448 | return node; |
1449 | } |
1450 | case addL_mem_rReg_0_rule: { |
1451 | addL_mem_rReg_0Node *node = new addL_mem_rReg_0Node(); |
1452 | node->_bottom_type = _leaf->bottom_type(); |
1453 | return node; |
1454 | } |
1455 | case addL_mem_imm_rule: { |
1456 | addL_mem_immNode *node = new addL_mem_immNode(); |
1457 | node->_bottom_type = _leaf->bottom_type(); |
1458 | return node; |
1459 | } |
1460 | case incL_rReg_rule: { |
1461 | incL_rRegNode *node = new incL_rRegNode(); |
1462 | return node; |
1463 | } |
1464 | case incL_mem_rule: { |
1465 | incL_memNode *node = new incL_memNode(); |
1466 | node->_bottom_type = _leaf->bottom_type(); |
1467 | return node; |
1468 | } |
1469 | case decL_rReg_rule: { |
1470 | decL_rRegNode *node = new decL_rRegNode(); |
1471 | return node; |
1472 | } |
1473 | case decL_mem_rule: { |
1474 | decL_memNode *node = new decL_memNode(); |
1475 | node->_bottom_type = _leaf->bottom_type(); |
1476 | return node; |
1477 | } |
1478 | case leaL_rReg_immL_rule: { |
1479 | leaL_rReg_immLNode *node = new leaL_rReg_immLNode(); |
1480 | return node; |
1481 | } |
1482 | case addP_rReg_rule: { |
1483 | addP_rRegNode *node = new addP_rRegNode(); |
1484 | node->_bottom_type = _leaf->bottom_type(); |
1485 | return node; |
1486 | } |
1487 | case addP_rReg_imm_rule: { |
1488 | addP_rReg_immNode *node = new addP_rReg_immNode(); |
1489 | node->_bottom_type = _leaf->bottom_type(); |
1490 | return node; |
1491 | } |
1492 | case leaP_rReg_imm_rule: { |
1493 | leaP_rReg_immNode *node = new leaP_rReg_immNode(); |
1494 | node->_bottom_type = _leaf->bottom_type(); |
1495 | return node; |
1496 | } |
1497 | case checkCastPP_rule: { |
1498 | checkCastPPNode *node = new checkCastPPNode(); |
1499 | node->_bottom_type = _leaf->bottom_type(); |
1500 | return node; |
1501 | } |
1502 | case castPP_rule: { |
1503 | castPPNode *node = new castPPNode(); |
1504 | node->_bottom_type = _leaf->bottom_type(); |
1505 | return node; |
1506 | } |
1507 | case castII_rule: { |
1508 | castIINode *node = new castIINode(); |
1509 | return node; |
1510 | } |
1511 | case loadPLocked_rule: { |
1512 | loadPLockedNode *node = new loadPLockedNode(); |
1513 | node->_bottom_type = _leaf->bottom_type(); |
1514 | return node; |
1515 | } |
1516 | case storePConditional_rule: { |
1517 | storePConditionalNode *node = new storePConditionalNode(); |
1518 | return node; |
1519 | } |
1520 | case storeIConditional_rule: { |
1521 | storeIConditionalNode *node = new storeIConditionalNode(); |
1522 | return node; |
1523 | } |
1524 | case storeLConditional_rule: { |
1525 | storeLConditionalNode *node = new storeLConditionalNode(); |
1526 | return node; |
1527 | } |
1528 | case compareAndSwapP_rule: { |
1529 | compareAndSwapPNode *node = new compareAndSwapPNode(); |
1530 | return node; |
1531 | } |
1532 | case compareAndSwapP_0_rule: { |
1533 | compareAndSwapP_0Node *node = new compareAndSwapP_0Node(); |
1534 | return node; |
1535 | } |
1536 | case compareAndSwapL_rule: { |
1537 | compareAndSwapLNode *node = new compareAndSwapLNode(); |
1538 | return node; |
1539 | } |
1540 | case compareAndSwapL_0_rule: { |
1541 | compareAndSwapL_0Node *node = new compareAndSwapL_0Node(); |
1542 | return node; |
1543 | } |
1544 | case compareAndSwapI_rule: { |
1545 | compareAndSwapINode *node = new compareAndSwapINode(); |
1546 | return node; |
1547 | } |
1548 | case compareAndSwapI_0_rule: { |
1549 | compareAndSwapI_0Node *node = new compareAndSwapI_0Node(); |
1550 | return node; |
1551 | } |
1552 | case compareAndSwapB_rule: { |
1553 | compareAndSwapBNode *node = new compareAndSwapBNode(); |
1554 | return node; |
1555 | } |
1556 | case compareAndSwapB_0_rule: { |
1557 | compareAndSwapB_0Node *node = new compareAndSwapB_0Node(); |
1558 | return node; |
1559 | } |
1560 | case compareAndSwapS_rule: { |
1561 | compareAndSwapSNode *node = new compareAndSwapSNode(); |
1562 | return node; |
1563 | } |
1564 | case compareAndSwapS_0_rule: { |
1565 | compareAndSwapS_0Node *node = new compareAndSwapS_0Node(); |
1566 | return node; |
1567 | } |
1568 | case compareAndSwapN_rule: { |
1569 | compareAndSwapNNode *node = new compareAndSwapNNode(); |
1570 | return node; |
1571 | } |
1572 | case compareAndSwapN_0_rule: { |
1573 | compareAndSwapN_0Node *node = new compareAndSwapN_0Node(); |
1574 | return node; |
1575 | } |
1576 | case compareAndExchangeB_rule: { |
1577 | compareAndExchangeBNode *node = new compareAndExchangeBNode(); |
1578 | return node; |
1579 | } |
1580 | case compareAndExchangeS_rule: { |
1581 | compareAndExchangeSNode *node = new compareAndExchangeSNode(); |
1582 | return node; |
1583 | } |
1584 | case compareAndExchangeI_rule: { |
1585 | compareAndExchangeINode *node = new compareAndExchangeINode(); |
1586 | return node; |
1587 | } |
1588 | case compareAndExchangeL_rule: { |
1589 | compareAndExchangeLNode *node = new compareAndExchangeLNode(); |
1590 | return node; |
1591 | } |
1592 | case compareAndExchangeN_rule: { |
1593 | compareAndExchangeNNode *node = new compareAndExchangeNNode(); |
1594 | node->_bottom_type = _leaf->bottom_type(); |
1595 | return node; |
1596 | } |
1597 | case compareAndExchangeP_rule: { |
1598 | compareAndExchangePNode *node = new compareAndExchangePNode(); |
1599 | node->_bottom_type = _leaf->bottom_type(); |
1600 | return node; |
1601 | } |
1602 | case xaddB_no_res_rule: { |
1603 | xaddB_no_resNode *node = new xaddB_no_resNode(); |
1604 | return node; |
1605 | } |
1606 | case xaddB_rule: { |
1607 | xaddBNode *node = new xaddBNode(); |
1608 | return node; |
1609 | } |
1610 | case xaddS_no_res_rule: { |
1611 | xaddS_no_resNode *node = new xaddS_no_resNode(); |
1612 | return node; |
1613 | } |
1614 | case xaddS_rule: { |
1615 | xaddSNode *node = new xaddSNode(); |
1616 | return node; |
1617 | } |
1618 | case xaddI_no_res_rule: { |
1619 | xaddI_no_resNode *node = new xaddI_no_resNode(); |
1620 | return node; |
1621 | } |
1622 | case xaddI_rule: { |
1623 | xaddINode *node = new xaddINode(); |
1624 | return node; |
1625 | } |
1626 | case xaddL_no_res_rule: { |
1627 | xaddL_no_resNode *node = new xaddL_no_resNode(); |
1628 | return node; |
1629 | } |
1630 | case xaddL_rule: { |
1631 | xaddLNode *node = new xaddLNode(); |
1632 | return node; |
1633 | } |
1634 | case xchgB_rule: { |
1635 | xchgBNode *node = new xchgBNode(); |
1636 | return node; |
1637 | } |
1638 | case xchgS_rule: { |
1639 | xchgSNode *node = new xchgSNode(); |
1640 | return node; |
1641 | } |
1642 | case xchgI_rule: { |
1643 | xchgINode *node = new xchgINode(); |
1644 | return node; |
1645 | } |
1646 | case xchgL_rule: { |
1647 | xchgLNode *node = new xchgLNode(); |
1648 | return node; |
1649 | } |
1650 | case xchgP_rule: { |
1651 | xchgPNode *node = new xchgPNode(); |
1652 | node->_bottom_type = _leaf->bottom_type(); |
1653 | return node; |
1654 | } |
1655 | case xchgN_rule: { |
1656 | xchgNNode *node = new xchgNNode(); |
1657 | node->_bottom_type = _leaf->bottom_type(); |
1658 | return node; |
1659 | } |
1660 | case absI_rReg_rule: { |
1661 | absI_rRegNode *node = new absI_rRegNode(); |
1662 | node->set_opnd_array(2, MachOperGenerator(RREGI)); |
1663 | node->set_opnd_array(3, MachOperGenerator(RREGI)); |
1664 | return node; |
1665 | } |
1666 | case absL_rReg_rule: { |
1667 | absL_rRegNode *node = new absL_rRegNode(); |
1668 | node->set_opnd_array(2, MachOperGenerator(RREGL)); |
1669 | node->set_opnd_array(3, MachOperGenerator(RREGL)); |
1670 | return node; |
1671 | } |
1672 | case subI_rReg_rule: { |
1673 | subI_rRegNode *node = new subI_rRegNode(); |
1674 | return node; |
1675 | } |
1676 | case subI_rReg_imm_rule: { |
1677 | subI_rReg_immNode *node = new subI_rReg_immNode(); |
1678 | return node; |
1679 | } |
1680 | case subI_rReg_mem_rule: { |
1681 | subI_rReg_memNode *node = new subI_rReg_memNode(); |
1682 | return node; |
1683 | } |
1684 | case subI_mem_rReg_rule: { |
1685 | subI_mem_rRegNode *node = new subI_mem_rRegNode(); |
1686 | node->_bottom_type = _leaf->bottom_type(); |
1687 | return node; |
1688 | } |
1689 | case subI_mem_imm_rule: { |
1690 | subI_mem_immNode *node = new subI_mem_immNode(); |
1691 | node->_bottom_type = _leaf->bottom_type(); |
1692 | return node; |
1693 | } |
1694 | case subL_rReg_rule: { |
1695 | subL_rRegNode *node = new subL_rRegNode(); |
1696 | return node; |
1697 | } |
1698 | case subL_rReg_imm_rule: { |
1699 | subL_rReg_immNode *node = new subL_rReg_immNode(); |
1700 | return node; |
1701 | } |
1702 | case subL_rReg_mem_rule: { |
1703 | subL_rReg_memNode *node = new subL_rReg_memNode(); |
1704 | return node; |
1705 | } |
1706 | case subL_mem_rReg_rule: { |
1707 | subL_mem_rRegNode *node = new subL_mem_rRegNode(); |
1708 | node->_bottom_type = _leaf->bottom_type(); |
1709 | return node; |
1710 | } |
1711 | case subL_mem_imm_rule: { |
1712 | subL_mem_immNode *node = new subL_mem_immNode(); |
1713 | node->_bottom_type = _leaf->bottom_type(); |
1714 | return node; |
1715 | } |
1716 | case subP_rReg_rule: { |
1717 | subP_rRegNode *node = new subP_rRegNode(); |
1718 | node->_bottom_type = _leaf->bottom_type(); |
1719 | return node; |
1720 | } |
1721 | case negI_rReg_rule: { |
1722 | negI_rRegNode *node = new negI_rRegNode(); |
1723 | return node; |
1724 | } |
1725 | case negI_mem_rule: { |
1726 | negI_memNode *node = new negI_memNode(); |
1727 | node->_bottom_type = _leaf->bottom_type(); |
1728 | return node; |
1729 | } |
1730 | case negL_rReg_rule: { |
1731 | negL_rRegNode *node = new negL_rRegNode(); |
1732 | return node; |
1733 | } |
1734 | case negL_mem_rule: { |
1735 | negL_memNode *node = new negL_memNode(); |
1736 | node->_bottom_type = _leaf->bottom_type(); |
1737 | return node; |
1738 | } |
1739 | case mulI_rReg_rule: { |
1740 | mulI_rRegNode *node = new mulI_rRegNode(); |
1741 | return node; |
1742 | } |
1743 | case mulI_rReg_imm_rule: { |
1744 | mulI_rReg_immNode *node = new mulI_rReg_immNode(); |
1745 | return node; |
1746 | } |
1747 | case mulI_mem_rule: { |
1748 | mulI_memNode *node = new mulI_memNode(); |
1749 | return node; |
1750 | } |
1751 | case mulI_mem_0_rule: { |
1752 | mulI_mem_0Node *node = new mulI_mem_0Node(); |
1753 | return node; |
1754 | } |
1755 | case mulI_mem_imm_rule: { |
1756 | mulI_mem_immNode *node = new mulI_mem_immNode(); |
1757 | return node; |
1758 | } |
1759 | case mulAddS2I_rReg_rule: { |
1760 | mulAddS2I_rRegNode *node = new mulAddS2I_rRegNode(); |
1761 | return node; |
1762 | } |
1763 | case mulL_rReg_rule: { |
1764 | mulL_rRegNode *node = new mulL_rRegNode(); |
1765 | return node; |
1766 | } |
1767 | case mulL_rReg_imm_rule: { |
1768 | mulL_rReg_immNode *node = new mulL_rReg_immNode(); |
1769 | return node; |
1770 | } |
1771 | case mulL_mem_rule: { |
1772 | mulL_memNode *node = new mulL_memNode(); |
1773 | return node; |
1774 | } |
1775 | case mulL_mem_0_rule: { |
1776 | mulL_mem_0Node *node = new mulL_mem_0Node(); |
1777 | return node; |
1778 | } |
1779 | case mulL_mem_imm_rule: { |
1780 | mulL_mem_immNode *node = new mulL_mem_immNode(); |
1781 | return node; |
1782 | } |
1783 | case mulHiL_rReg_rule: { |
1784 | mulHiL_rRegNode *node = new mulHiL_rRegNode(); |
1785 | return node; |
1786 | } |
1787 | case divI_rReg_rule: { |
1788 | divI_rRegNode *node = new divI_rRegNode(); |
1789 | return node; |
1790 | } |
1791 | case divL_rReg_rule: { |
1792 | divL_rRegNode *node = new divL_rRegNode(); |
1793 | return node; |
1794 | } |
1795 | case divModI_rReg_divmod_rule: { |
1796 | divModI_rReg_divmodNode *node = new divModI_rReg_divmodNode(); |
1797 | return node; |
1798 | } |
1799 | case divModL_rReg_divmod_rule: { |
1800 | divModL_rReg_divmodNode *node = new divModL_rReg_divmodNode(); |
1801 | return node; |
1802 | } |
1803 | case divL_10_rule: { |
1804 | divL_10Node *node = new divL_10Node(); |
1805 | return node; |
1806 | } |
1807 | case modI_rReg_rule: { |
1808 | modI_rRegNode *node = new modI_rRegNode(); |
1809 | return node; |
1810 | } |
1811 | case modL_rReg_rule: { |
1812 | modL_rRegNode *node = new modL_rRegNode(); |
1813 | return node; |
1814 | } |
1815 | case salI_rReg_1_rule: { |
1816 | salI_rReg_1Node *node = new salI_rReg_1Node(); |
1817 | return node; |
1818 | } |
1819 | case salI_mem_1_rule: { |
1820 | salI_mem_1Node *node = new salI_mem_1Node(); |
1821 | node->_bottom_type = _leaf->bottom_type(); |
1822 | return node; |
1823 | } |
1824 | case salI_rReg_imm_rule: { |
1825 | salI_rReg_immNode *node = new salI_rReg_immNode(); |
1826 | return node; |
1827 | } |
1828 | case salI_mem_imm_rule: { |
1829 | salI_mem_immNode *node = new salI_mem_immNode(); |
1830 | node->_bottom_type = _leaf->bottom_type(); |
1831 | return node; |
1832 | } |
1833 | case salI_rReg_CL_rule: { |
1834 | salI_rReg_CLNode *node = new salI_rReg_CLNode(); |
1835 | return node; |
1836 | } |
1837 | case salI_mem_CL_rule: { |
1838 | salI_mem_CLNode *node = new salI_mem_CLNode(); |
1839 | node->_bottom_type = _leaf->bottom_type(); |
1840 | return node; |
1841 | } |
1842 | case sarI_rReg_1_rule: { |
1843 | sarI_rReg_1Node *node = new sarI_rReg_1Node(); |
1844 | return node; |
1845 | } |
1846 | case sarI_mem_1_rule: { |
1847 | sarI_mem_1Node *node = new sarI_mem_1Node(); |
1848 | node->_bottom_type = _leaf->bottom_type(); |
1849 | return node; |
1850 | } |
1851 | case sarI_rReg_imm_rule: { |
1852 | sarI_rReg_immNode *node = new sarI_rReg_immNode(); |
1853 | return node; |
1854 | } |
1855 | case sarI_mem_imm_rule: { |
1856 | sarI_mem_immNode *node = new sarI_mem_immNode(); |
1857 | node->_bottom_type = _leaf->bottom_type(); |
1858 | return node; |
1859 | } |
1860 | case sarI_rReg_CL_rule: { |
1861 | sarI_rReg_CLNode *node = new sarI_rReg_CLNode(); |
1862 | return node; |
1863 | } |
1864 | case sarI_mem_CL_rule: { |
1865 | sarI_mem_CLNode *node = new sarI_mem_CLNode(); |
1866 | node->_bottom_type = _leaf->bottom_type(); |
1867 | return node; |
1868 | } |
1869 | case shrI_rReg_1_rule: { |
1870 | shrI_rReg_1Node *node = new shrI_rReg_1Node(); |
1871 | return node; |
1872 | } |
1873 | case shrI_mem_1_rule: { |
1874 | shrI_mem_1Node *node = new shrI_mem_1Node(); |
1875 | node->_bottom_type = _leaf->bottom_type(); |
1876 | return node; |
1877 | } |
1878 | case shrI_rReg_imm_rule: { |
1879 | shrI_rReg_immNode *node = new shrI_rReg_immNode(); |
1880 | return node; |
1881 | } |
1882 | case shrI_mem_imm_rule: { |
1883 | shrI_mem_immNode *node = new shrI_mem_immNode(); |
1884 | node->_bottom_type = _leaf->bottom_type(); |
1885 | return node; |
1886 | } |
1887 | case shrI_rReg_CL_rule: { |
1888 | shrI_rReg_CLNode *node = new shrI_rReg_CLNode(); |
1889 | return node; |
1890 | } |
1891 | case shrI_mem_CL_rule: { |
1892 | shrI_mem_CLNode *node = new shrI_mem_CLNode(); |
1893 | node->_bottom_type = _leaf->bottom_type(); |
1894 | return node; |
1895 | } |
1896 | case salL_rReg_1_rule: { |
1897 | salL_rReg_1Node *node = new salL_rReg_1Node(); |
1898 | return node; |
1899 | } |
1900 | case salL_mem_1_rule: { |
1901 | salL_mem_1Node *node = new salL_mem_1Node(); |
1902 | node->_bottom_type = _leaf->bottom_type(); |
1903 | return node; |
1904 | } |
1905 | case salL_rReg_imm_rule: { |
1906 | salL_rReg_immNode *node = new salL_rReg_immNode(); |
1907 | return node; |
1908 | } |
1909 | case salL_mem_imm_rule: { |
1910 | salL_mem_immNode *node = new salL_mem_immNode(); |
1911 | node->_bottom_type = _leaf->bottom_type(); |
1912 | return node; |
1913 | } |
1914 | case salL_rReg_CL_rule: { |
1915 | salL_rReg_CLNode *node = new salL_rReg_CLNode(); |
1916 | return node; |
1917 | } |
1918 | case salL_mem_CL_rule: { |
1919 | salL_mem_CLNode *node = new salL_mem_CLNode(); |
1920 | node->_bottom_type = _leaf->bottom_type(); |
1921 | return node; |
1922 | } |
1923 | case sarL_rReg_1_rule: { |
1924 | sarL_rReg_1Node *node = new sarL_rReg_1Node(); |
1925 | return node; |
1926 | } |
1927 | case sarL_mem_1_rule: { |
1928 | sarL_mem_1Node *node = new sarL_mem_1Node(); |
1929 | node->_bottom_type = _leaf->bottom_type(); |
1930 | return node; |
1931 | } |
1932 | case sarL_rReg_imm_rule: { |
1933 | sarL_rReg_immNode *node = new sarL_rReg_immNode(); |
1934 | return node; |
1935 | } |
1936 | case sarL_mem_imm_rule: { |
1937 | sarL_mem_immNode *node = new sarL_mem_immNode(); |
1938 | node->_bottom_type = _leaf->bottom_type(); |
1939 | return node; |
1940 | } |
1941 | case sarL_rReg_CL_rule: { |
1942 | sarL_rReg_CLNode *node = new sarL_rReg_CLNode(); |
1943 | return node; |
1944 | } |
1945 | case sarL_mem_CL_rule: { |
1946 | sarL_mem_CLNode *node = new sarL_mem_CLNode(); |
1947 | node->_bottom_type = _leaf->bottom_type(); |
1948 | return node; |
1949 | } |
1950 | case shrL_rReg_1_rule: { |
1951 | shrL_rReg_1Node *node = new shrL_rReg_1Node(); |
1952 | return node; |
1953 | } |
1954 | case shrL_mem_1_rule: { |
1955 | shrL_mem_1Node *node = new shrL_mem_1Node(); |
1956 | node->_bottom_type = _leaf->bottom_type(); |
1957 | return node; |
1958 | } |
1959 | case shrL_rReg_imm_rule: { |
1960 | shrL_rReg_immNode *node = new shrL_rReg_immNode(); |
1961 | return node; |
1962 | } |
1963 | case shrL_mem_imm_rule: { |
1964 | shrL_mem_immNode *node = new shrL_mem_immNode(); |
1965 | node->_bottom_type = _leaf->bottom_type(); |
1966 | return node; |
1967 | } |
1968 | case shrL_rReg_CL_rule: { |
1969 | shrL_rReg_CLNode *node = new shrL_rReg_CLNode(); |
1970 | return node; |
1971 | } |
1972 | case shrL_mem_CL_rule: { |
1973 | shrL_mem_CLNode *node = new shrL_mem_CLNode(); |
1974 | node->_bottom_type = _leaf->bottom_type(); |
1975 | return node; |
1976 | } |
1977 | case i2b_rule: { |
1978 | i2bNode *node = new i2bNode(); |
1979 | return node; |
1980 | } |
1981 | case i2s_rule: { |
1982 | i2sNode *node = new i2sNode(); |
1983 | return node; |
1984 | } |
1985 | case rolI_rReg_i1_rule: { |
1986 | rolI_rReg_i1Node *node = new rolI_rReg_i1Node(); |
1987 | return node; |
1988 | } |
1989 | case rolI_rReg_i1_0_rule: { |
1990 | rolI_rReg_i1_0Node *node = new rolI_rReg_i1_0Node(); |
1991 | return node; |
1992 | } |
1993 | case rolI_rReg_i8_rule: { |
1994 | rolI_rReg_i8Node *node = new rolI_rReg_i8Node(); |
1995 | return node; |
1996 | } |
1997 | case rolI_rReg_i8_0_rule: { |
1998 | rolI_rReg_i8_0Node *node = new rolI_rReg_i8_0Node(); |
1999 | return node; |
2000 | } |
2001 | case rolI_rReg_Var_C0_rule: { |
2002 | rolI_rReg_Var_C0Node *node = new rolI_rReg_Var_C0Node(); |
2003 | return node; |
2004 | } |
2005 | case rolI_rReg_Var_C0_0_rule: { |
2006 | rolI_rReg_Var_C0_0Node *node = new rolI_rReg_Var_C0_0Node(); |
2007 | return node; |
2008 | } |
2009 | case rolI_rReg_Var_C32_rule: { |
2010 | rolI_rReg_Var_C32Node *node = new rolI_rReg_Var_C32Node(); |
2011 | return node; |
2012 | } |
2013 | case rolI_rReg_Var_C32_0_rule: { |
2014 | rolI_rReg_Var_C32_0Node *node = new rolI_rReg_Var_C32_0Node(); |
2015 | return node; |
2016 | } |
2017 | case rorI_rReg_i1_rule: { |
2018 | rorI_rReg_i1Node *node = new rorI_rReg_i1Node(); |
2019 | return node; |
2020 | } |
2021 | case rorI_rReg_i1_0_rule: { |
2022 | rorI_rReg_i1_0Node *node = new rorI_rReg_i1_0Node(); |
2023 | return node; |
2024 | } |
2025 | case rorI_rReg_i8_rule: { |
2026 | rorI_rReg_i8Node *node = new rorI_rReg_i8Node(); |
2027 | return node; |
2028 | } |
2029 | case rorI_rReg_i8_0_rule: { |
2030 | rorI_rReg_i8_0Node *node = new rorI_rReg_i8_0Node(); |
2031 | return node; |
2032 | } |
2033 | case rorI_rReg_Var_C0_rule: { |
2034 | rorI_rReg_Var_C0Node *node = new rorI_rReg_Var_C0Node(); |
2035 | return node; |
2036 | } |
2037 | case rorI_rReg_Var_C0_0_rule: { |
2038 | rorI_rReg_Var_C0_0Node *node = new rorI_rReg_Var_C0_0Node(); |
2039 | return node; |
2040 | } |
2041 | case rorI_rReg_Var_C32_rule: { |
2042 | rorI_rReg_Var_C32Node *node = new rorI_rReg_Var_C32Node(); |
2043 | return node; |
2044 | } |
2045 | case rorI_rReg_Var_C32_0_rule: { |
2046 | rorI_rReg_Var_C32_0Node *node = new rorI_rReg_Var_C32_0Node(); |
2047 | return node; |
2048 | } |
2049 | case rolL_rReg_i1_rule: { |
2050 | rolL_rReg_i1Node *node = new rolL_rReg_i1Node(); |
2051 | return node; |
2052 | } |
2053 | case rolL_rReg_i1_0_rule: { |
2054 | rolL_rReg_i1_0Node *node = new rolL_rReg_i1_0Node(); |
2055 | return node; |
2056 | } |
2057 | case rolL_rReg_i8_rule: { |
2058 | rolL_rReg_i8Node *node = new rolL_rReg_i8Node(); |
2059 | return node; |
2060 | } |
2061 | case rolL_rReg_i8_0_rule: { |
2062 | rolL_rReg_i8_0Node *node = new rolL_rReg_i8_0Node(); |
2063 | return node; |
2064 | } |
2065 | case rolL_rReg_Var_C0_rule: { |
2066 | rolL_rReg_Var_C0Node *node = new rolL_rReg_Var_C0Node(); |
2067 | return node; |
2068 | } |
2069 | case rolL_rReg_Var_C0_0_rule: { |
2070 | rolL_rReg_Var_C0_0Node *node = new rolL_rReg_Var_C0_0Node(); |
2071 | return node; |
2072 | } |
2073 | case rolL_rReg_Var_C64_rule: { |
2074 | rolL_rReg_Var_C64Node *node = new rolL_rReg_Var_C64Node(); |
2075 | return node; |
2076 | } |
2077 | case rolL_rReg_Var_C64_0_rule: { |
2078 | rolL_rReg_Var_C64_0Node *node = new rolL_rReg_Var_C64_0Node(); |
2079 | return node; |
2080 | } |
2081 | case rorL_rReg_i1_rule: { |
2082 | rorL_rReg_i1Node *node = new rorL_rReg_i1Node(); |
2083 | return node; |
2084 | } |
2085 | case rorL_rReg_i1_0_rule: { |
2086 | rorL_rReg_i1_0Node *node = new rorL_rReg_i1_0Node(); |
2087 | return node; |
2088 | } |
2089 | case rorL_rReg_i8_rule: { |
2090 | rorL_rReg_i8Node *node = new rorL_rReg_i8Node(); |
2091 | return node; |
2092 | } |
2093 | case rorL_rReg_i8_0_rule: { |
2094 | rorL_rReg_i8_0Node *node = new rorL_rReg_i8_0Node(); |
2095 | return node; |
2096 | } |
2097 | case rorL_rReg_Var_C0_rule: { |
2098 | rorL_rReg_Var_C0Node *node = new rorL_rReg_Var_C0Node(); |
2099 | return node; |
2100 | } |
2101 | case rorL_rReg_Var_C0_0_rule: { |
2102 | rorL_rReg_Var_C0_0Node *node = new rorL_rReg_Var_C0_0Node(); |
2103 | return node; |
2104 | } |
2105 | case rorL_rReg_Var_C64_rule: { |
2106 | rorL_rReg_Var_C64Node *node = new rorL_rReg_Var_C64Node(); |
2107 | return node; |
2108 | } |
2109 | case rorL_rReg_Var_C64_0_rule: { |
2110 | rorL_rReg_Var_C64_0Node *node = new rorL_rReg_Var_C64_0Node(); |
2111 | return node; |
2112 | } |
2113 | case andI_rReg_rule: { |
2114 | andI_rRegNode *node = new andI_rRegNode(); |
2115 | return node; |
2116 | } |
2117 | case andI_rReg_imm255_rule: { |
2118 | andI_rReg_imm255Node *node = new andI_rReg_imm255Node(); |
2119 | return node; |
2120 | } |
2121 | case andI2L_rReg_imm255_rule: { |
2122 | andI2L_rReg_imm255Node *node = new andI2L_rReg_imm255Node(); |
2123 | return node; |
2124 | } |
2125 | case andI_rReg_imm65535_rule: { |
2126 | andI_rReg_imm65535Node *node = new andI_rReg_imm65535Node(); |
2127 | return node; |
2128 | } |
2129 | case andI2L_rReg_imm65535_rule: { |
2130 | andI2L_rReg_imm65535Node *node = new andI2L_rReg_imm65535Node(); |
2131 | return node; |
2132 | } |
2133 | case andI_rReg_imm_rule: { |
2134 | andI_rReg_immNode *node = new andI_rReg_immNode(); |
2135 | return node; |
2136 | } |
2137 | case andI_rReg_mem_rule: { |
2138 | andI_rReg_memNode *node = new andI_rReg_memNode(); |
2139 | return node; |
2140 | } |
2141 | case andI_rReg_mem_0_rule: { |
2142 | andI_rReg_mem_0Node *node = new andI_rReg_mem_0Node(); |
2143 | return node; |
2144 | } |
2145 | case andB_mem_rReg_rule: { |
2146 | andB_mem_rRegNode *node = new andB_mem_rRegNode(); |
2147 | node->_bottom_type = _leaf->bottom_type(); |
2148 | return node; |
2149 | } |
2150 | case andB_mem_rReg_0_rule: { |
2151 | andB_mem_rReg_0Node *node = new andB_mem_rReg_0Node(); |
2152 | node->_bottom_type = _leaf->bottom_type(); |
2153 | return node; |
2154 | } |
2155 | case andI_mem_rReg_rule: { |
2156 | andI_mem_rRegNode *node = new andI_mem_rRegNode(); |
2157 | node->_bottom_type = _leaf->bottom_type(); |
2158 | return node; |
2159 | } |
2160 | case andI_mem_rReg_0_rule: { |
2161 | andI_mem_rReg_0Node *node = new andI_mem_rReg_0Node(); |
2162 | node->_bottom_type = _leaf->bottom_type(); |
2163 | return node; |
2164 | } |
2165 | case andI_mem_imm_rule: { |
2166 | andI_mem_immNode *node = new andI_mem_immNode(); |
2167 | node->_bottom_type = _leaf->bottom_type(); |
2168 | return node; |
2169 | } |
2170 | case andnI_rReg_rReg_mem_rule: { |
2171 | andnI_rReg_rReg_memNode *node = new andnI_rReg_rReg_memNode(); |
2172 | return node; |
2173 | } |
2174 | case andnI_rReg_rReg_mem_0_rule: { |
2175 | andnI_rReg_rReg_mem_0Node *node = new andnI_rReg_rReg_mem_0Node(); |
2176 | return node; |
2177 | } |
2178 | case andnI_rReg_rReg_rReg_rule: { |
2179 | andnI_rReg_rReg_rRegNode *node = new andnI_rReg_rReg_rRegNode(); |
2180 | return node; |
2181 | } |
2182 | case andnI_rReg_rReg_rReg_0_rule: { |
2183 | andnI_rReg_rReg_rReg_0Node *node = new andnI_rReg_rReg_rReg_0Node(); |
2184 | return node; |
2185 | } |
2186 | case blsiI_rReg_rReg_rule: { |
2187 | blsiI_rReg_rRegNode *node = new blsiI_rReg_rRegNode(); |
2188 | return node; |
2189 | } |
2190 | case blsiI_rReg_rReg_0_rule: { |
2191 | blsiI_rReg_rReg_0Node *node = new blsiI_rReg_rReg_0Node(); |
2192 | return node; |
2193 | } |
2194 | case blsiI_rReg_mem_rule: { |
2195 | blsiI_rReg_memNode *node = new blsiI_rReg_memNode(); |
2196 | return node; |
2197 | } |
2198 | case blsiI_rReg_mem_0_rule: { |
2199 | blsiI_rReg_mem_0Node *node = new blsiI_rReg_mem_0Node(); |
2200 | return node; |
2201 | } |
2202 | case blsmskI_rReg_mem_rule: { |
2203 | blsmskI_rReg_memNode *node = new blsmskI_rReg_memNode(); |
2204 | return node; |
2205 | } |
2206 | case blsmskI_rReg_mem_0_rule: { |
2207 | blsmskI_rReg_mem_0Node *node = new blsmskI_rReg_mem_0Node(); |
2208 | return node; |
2209 | } |
2210 | case blsmskI_rReg_rReg_rule: { |
2211 | blsmskI_rReg_rRegNode *node = new blsmskI_rReg_rRegNode(); |
2212 | return node; |
2213 | } |
2214 | case blsmskI_rReg_rReg_0_rule: { |
2215 | blsmskI_rReg_rReg_0Node *node = new blsmskI_rReg_rReg_0Node(); |
2216 | return node; |
2217 | } |
2218 | case blsrI_rReg_rReg_rule: { |
2219 | blsrI_rReg_rRegNode *node = new blsrI_rReg_rRegNode(); |
2220 | return node; |
2221 | } |
2222 | case blsrI_rReg_rReg_0_rule: { |
2223 | blsrI_rReg_rReg_0Node *node = new blsrI_rReg_rReg_0Node(); |
2224 | return node; |
2225 | } |
2226 | case blsrI_rReg_mem_rule: { |
2227 | blsrI_rReg_memNode *node = new blsrI_rReg_memNode(); |
2228 | return node; |
2229 | } |
2230 | case blsrI_rReg_mem_0_rule: { |
2231 | blsrI_rReg_mem_0Node *node = new blsrI_rReg_mem_0Node(); |
2232 | return node; |
2233 | } |
2234 | case orI_rReg_rule: { |
2235 | orI_rRegNode *node = new orI_rRegNode(); |
2236 | return node; |
2237 | } |
2238 | case orI_rReg_imm_rule: { |
2239 | orI_rReg_immNode *node = new orI_rReg_immNode(); |
2240 | return node; |
2241 | } |
2242 | case orI_rReg_mem_rule: { |
2243 | orI_rReg_memNode *node = new orI_rReg_memNode(); |
2244 | return node; |
2245 | } |
2246 | case orI_rReg_mem_0_rule: { |
2247 | orI_rReg_mem_0Node *node = new orI_rReg_mem_0Node(); |
2248 | return node; |
2249 | } |
2250 | case orB_mem_rReg_rule: { |
2251 | orB_mem_rRegNode *node = new orB_mem_rRegNode(); |
2252 | node->_bottom_type = _leaf->bottom_type(); |
2253 | return node; |
2254 | } |
2255 | case orB_mem_rReg_0_rule: { |
2256 | orB_mem_rReg_0Node *node = new orB_mem_rReg_0Node(); |
2257 | node->_bottom_type = _leaf->bottom_type(); |
2258 | return node; |
2259 | } |
2260 | case orI_mem_rReg_rule: { |
2261 | orI_mem_rRegNode *node = new orI_mem_rRegNode(); |
2262 | node->_bottom_type = _leaf->bottom_type(); |
2263 | return node; |
2264 | } |
2265 | case orI_mem_rReg_0_rule: { |
2266 | orI_mem_rReg_0Node *node = new orI_mem_rReg_0Node(); |
2267 | node->_bottom_type = _leaf->bottom_type(); |
2268 | return node; |
2269 | } |
2270 | case orI_mem_imm_rule: { |
2271 | orI_mem_immNode *node = new orI_mem_immNode(); |
2272 | node->_bottom_type = _leaf->bottom_type(); |
2273 | return node; |
2274 | } |
2275 | case xorI_rReg_rule: { |
2276 | xorI_rRegNode *node = new xorI_rRegNode(); |
2277 | return node; |
2278 | } |
2279 | case xorI_rReg_im1_rule: { |
2280 | xorI_rReg_im1Node *node = new xorI_rReg_im1Node(); |
2281 | return node; |
2282 | } |
2283 | case xorI_rReg_imm_rule: { |
2284 | xorI_rReg_immNode *node = new xorI_rReg_immNode(); |
2285 | return node; |
2286 | } |
2287 | case xorI_rReg_mem_rule: { |
2288 | xorI_rReg_memNode *node = new xorI_rReg_memNode(); |
2289 | return node; |
2290 | } |
2291 | case xorI_rReg_mem_0_rule: { |
2292 | xorI_rReg_mem_0Node *node = new xorI_rReg_mem_0Node(); |
2293 | return node; |
2294 | } |
2295 | case xorB_mem_rReg_rule: { |
2296 | xorB_mem_rRegNode *node = new xorB_mem_rRegNode(); |
2297 | node->_bottom_type = _leaf->bottom_type(); |
2298 | return node; |
2299 | } |
2300 | case xorB_mem_rReg_0_rule: { |
2301 | xorB_mem_rReg_0Node *node = new xorB_mem_rReg_0Node(); |
2302 | node->_bottom_type = _leaf->bottom_type(); |
2303 | return node; |
2304 | } |
2305 | case xorI_mem_rReg_rule: { |
2306 | xorI_mem_rRegNode *node = new xorI_mem_rRegNode(); |
2307 | node->_bottom_type = _leaf->bottom_type(); |
2308 | return node; |
2309 | } |
2310 | case xorI_mem_rReg_0_rule: { |
2311 | xorI_mem_rReg_0Node *node = new xorI_mem_rReg_0Node(); |
2312 | node->_bottom_type = _leaf->bottom_type(); |
2313 | return node; |
2314 | } |
2315 | case xorI_mem_imm_rule: { |
2316 | xorI_mem_immNode *node = new xorI_mem_immNode(); |
2317 | node->_bottom_type = _leaf->bottom_type(); |
2318 | return node; |
2319 | } |
2320 | case andL_rReg_rule: { |
2321 | andL_rRegNode *node = new andL_rRegNode(); |
2322 | return node; |
2323 | } |
2324 | case andL_rReg_imm255_rule: { |
2325 | andL_rReg_imm255Node *node = new andL_rReg_imm255Node(); |
2326 | return node; |
2327 | } |
2328 | case andL_rReg_imm65535_rule: { |
2329 | andL_rReg_imm65535Node *node = new andL_rReg_imm65535Node(); |
2330 | return node; |
2331 | } |
2332 | case andL_rReg_imm_rule: { |
2333 | andL_rReg_immNode *node = new andL_rReg_immNode(); |
2334 | return node; |
2335 | } |
2336 | case andL_rReg_mem_rule: { |
2337 | andL_rReg_memNode *node = new andL_rReg_memNode(); |
2338 | return node; |
2339 | } |
2340 | case andL_rReg_mem_0_rule: { |
2341 | andL_rReg_mem_0Node *node = new andL_rReg_mem_0Node(); |
2342 | return node; |
2343 | } |
2344 | case andL_mem_rReg_rule: { |
2345 | andL_mem_rRegNode *node = new andL_mem_rRegNode(); |
2346 | node->_bottom_type = _leaf->bottom_type(); |
2347 | return node; |
2348 | } |
2349 | case andL_mem_rReg_0_rule: { |
2350 | andL_mem_rReg_0Node *node = new andL_mem_rReg_0Node(); |
2351 | node->_bottom_type = _leaf->bottom_type(); |
2352 | return node; |
2353 | } |
2354 | case andL_mem_imm_rule: { |
2355 | andL_mem_immNode *node = new andL_mem_immNode(); |
2356 | node->_bottom_type = _leaf->bottom_type(); |
2357 | return node; |
2358 | } |
2359 | case andnL_rReg_rReg_mem_rule: { |
2360 | andnL_rReg_rReg_memNode *node = new andnL_rReg_rReg_memNode(); |
2361 | return node; |
2362 | } |
2363 | case andnL_rReg_rReg_mem_0_rule: { |
2364 | andnL_rReg_rReg_mem_0Node *node = new andnL_rReg_rReg_mem_0Node(); |
2365 | return node; |
2366 | } |
2367 | case andnL_rReg_rReg_rReg_rule: { |
2368 | andnL_rReg_rReg_rRegNode *node = new andnL_rReg_rReg_rRegNode(); |
2369 | return node; |
2370 | } |
2371 | case andnL_rReg_rReg_rReg_0_rule: { |
2372 | andnL_rReg_rReg_rReg_0Node *node = new andnL_rReg_rReg_rReg_0Node(); |
2373 | return node; |
2374 | } |
2375 | case blsiL_rReg_rReg_rule: { |
2376 | blsiL_rReg_rRegNode *node = new blsiL_rReg_rRegNode(); |
2377 | return node; |
2378 | } |
2379 | case blsiL_rReg_rReg_0_rule: { |
2380 | blsiL_rReg_rReg_0Node *node = new blsiL_rReg_rReg_0Node(); |
2381 | return node; |
2382 | } |
2383 | case blsiL_rReg_mem_rule: { |
2384 | blsiL_rReg_memNode *node = new blsiL_rReg_memNode(); |
2385 | return node; |
2386 | } |
2387 | case blsiL_rReg_mem_0_rule: { |
2388 | blsiL_rReg_mem_0Node *node = new blsiL_rReg_mem_0Node(); |
2389 | return node; |
2390 | } |
2391 | case blsmskL_rReg_mem_rule: { |
2392 | blsmskL_rReg_memNode *node = new blsmskL_rReg_memNode(); |
2393 | return node; |
2394 | } |
2395 | case blsmskL_rReg_mem_0_rule: { |
2396 | blsmskL_rReg_mem_0Node *node = new blsmskL_rReg_mem_0Node(); |
2397 | return node; |
2398 | } |
2399 | case blsmskL_rReg_rReg_rule: { |
2400 | blsmskL_rReg_rRegNode *node = new blsmskL_rReg_rRegNode(); |
2401 | return node; |
2402 | } |
2403 | case blsmskL_rReg_rReg_0_rule: { |
2404 | blsmskL_rReg_rReg_0Node *node = new blsmskL_rReg_rReg_0Node(); |
2405 | return node; |
2406 | } |
2407 | case blsrL_rReg_rReg_rule: { |
2408 | blsrL_rReg_rRegNode *node = new blsrL_rReg_rRegNode(); |
2409 | return node; |
2410 | } |
2411 | case blsrL_rReg_rReg_0_rule: { |
2412 | blsrL_rReg_rReg_0Node *node = new blsrL_rReg_rReg_0Node(); |
2413 | return node; |
2414 | } |
2415 | case blsrL_rReg_mem_rule: { |
2416 | blsrL_rReg_memNode *node = new blsrL_rReg_memNode(); |
2417 | return node; |
2418 | } |
2419 | case blsrL_rReg_mem_0_rule: { |
2420 | blsrL_rReg_mem_0Node *node = new blsrL_rReg_mem_0Node(); |
2421 | return node; |
2422 | } |
2423 | case orL_rReg_rule: { |
2424 | orL_rRegNode *node = new orL_rRegNode(); |
2425 | return node; |
2426 | } |
2427 | case orL_rReg_castP2X_rule: { |
2428 | orL_rReg_castP2XNode *node = new orL_rReg_castP2XNode(); |
2429 | return node; |
2430 | } |
2431 | case orL_rReg_castP2X_0_rule: { |
2432 | orL_rReg_castP2X_0Node *node = new orL_rReg_castP2X_0Node(); |
2433 | return node; |
2434 | } |
2435 | case orL_rReg_imm_rule: { |
2436 | orL_rReg_immNode *node = new orL_rReg_immNode(); |
2437 | return node; |
2438 | } |
2439 | case orL_rReg_mem_rule: { |
2440 | orL_rReg_memNode *node = new orL_rReg_memNode(); |
2441 | return node; |
2442 | } |
2443 | case orL_rReg_mem_0_rule: { |
2444 | orL_rReg_mem_0Node *node = new orL_rReg_mem_0Node(); |
2445 | return node; |
2446 | } |
2447 | case orL_mem_rReg_rule: { |
2448 | orL_mem_rRegNode *node = new orL_mem_rRegNode(); |
2449 | node->_bottom_type = _leaf->bottom_type(); |
2450 | return node; |
2451 | } |
2452 | case orL_mem_rReg_0_rule: { |
2453 | orL_mem_rReg_0Node *node = new orL_mem_rReg_0Node(); |
2454 | node->_bottom_type = _leaf->bottom_type(); |
2455 | return node; |
2456 | } |
2457 | case orL_mem_imm_rule: { |
2458 | orL_mem_immNode *node = new orL_mem_immNode(); |
2459 | node->_bottom_type = _leaf->bottom_type(); |
2460 | return node; |
2461 | } |
2462 | case xorL_rReg_rule: { |
2463 | xorL_rRegNode *node = new xorL_rRegNode(); |
2464 | return node; |
2465 | } |
2466 | case xorL_rReg_im1_rule: { |
2467 | xorL_rReg_im1Node *node = new xorL_rReg_im1Node(); |
2468 | return node; |
2469 | } |
2470 | case xorL_rReg_imm_rule: { |
2471 | xorL_rReg_immNode *node = new xorL_rReg_immNode(); |
2472 | return node; |
2473 | } |
2474 | case xorL_rReg_mem_rule: { |
2475 | xorL_rReg_memNode *node = new xorL_rReg_memNode(); |
2476 | return node; |
2477 | } |
2478 | case xorL_rReg_mem_0_rule: { |
2479 | xorL_rReg_mem_0Node *node = new xorL_rReg_mem_0Node(); |
2480 | return node; |
2481 | } |
2482 | case xorL_mem_rReg_rule: { |
2483 | xorL_mem_rRegNode *node = new xorL_mem_rRegNode(); |
2484 | node->_bottom_type = _leaf->bottom_type(); |
2485 | return node; |
2486 | } |
2487 | case xorL_mem_rReg_0_rule: { |
2488 | xorL_mem_rReg_0Node *node = new xorL_mem_rReg_0Node(); |
2489 | node->_bottom_type = _leaf->bottom_type(); |
2490 | return node; |
2491 | } |
2492 | case xorL_mem_imm_rule: { |
2493 | xorL_mem_immNode *node = new xorL_mem_immNode(); |
2494 | node->_bottom_type = _leaf->bottom_type(); |
2495 | return node; |
2496 | } |
2497 | case convI2B_rule: { |
2498 | convI2BNode *node = new convI2BNode(); |
2499 | return node; |
2500 | } |
2501 | case convP2B_rule: { |
2502 | convP2BNode *node = new convP2BNode(); |
2503 | return node; |
2504 | } |
2505 | case cmpLTMask_rule: { |
2506 | cmpLTMaskNode *node = new cmpLTMaskNode(); |
2507 | return node; |
2508 | } |
2509 | case cmpLTMask0_rule: { |
2510 | cmpLTMask0Node *node = new cmpLTMask0Node(); |
2511 | return node; |
2512 | } |
2513 | case cadd_cmpLTMask_rule: { |
2514 | cadd_cmpLTMaskNode *node = new cadd_cmpLTMaskNode(); |
2515 | return node; |
2516 | } |
2517 | case cadd_cmpLTMask_1_rule: { |
2518 | cadd_cmpLTMask_1Node *node = new cadd_cmpLTMask_1Node(); |
2519 | return node; |
2520 | } |
2521 | case cadd_cmpLTMask_0_rule: { |
2522 | cadd_cmpLTMask_0Node *node = new cadd_cmpLTMask_0Node(); |
2523 | return node; |
2524 | } |
2525 | case cadd_cmpLTMask_2_rule: { |
2526 | cadd_cmpLTMask_2Node *node = new cadd_cmpLTMask_2Node(); |
2527 | return node; |
2528 | } |
2529 | case and_cmpLTMask_rule: { |
2530 | and_cmpLTMaskNode *node = new and_cmpLTMaskNode(); |
2531 | return node; |
2532 | } |
2533 | case and_cmpLTMask_0_rule: { |
2534 | and_cmpLTMask_0Node *node = new and_cmpLTMask_0Node(); |
2535 | return node; |
2536 | } |
2537 | case cmpF_cc_reg_rule: { |
2538 | cmpF_cc_regNode *node = new cmpF_cc_regNode(); |
2539 | return node; |
2540 | } |
2541 | case cmpF_cc_reg_CF_rule: { |
2542 | cmpF_cc_reg_CFNode *node = new cmpF_cc_reg_CFNode(); |
2543 | return node; |
2544 | } |
2545 | case cmpF_cc_mem_rule: { |
2546 | cmpF_cc_memNode *node = new cmpF_cc_memNode(); |
2547 | return node; |
2548 | } |
2549 | case cmpF_cc_memCF_rule: { |
2550 | cmpF_cc_memCFNode *node = new cmpF_cc_memCFNode(); |
2551 | return node; |
2552 | } |
2553 | case cmpF_cc_imm_rule: { |
2554 | cmpF_cc_immNode *node = new cmpF_cc_immNode(); |
2555 | node->_bottom_type = _leaf->bottom_type(); |
2556 | return node; |
2557 | } |
2558 | case cmpF_cc_immCF_rule: { |
2559 | cmpF_cc_immCFNode *node = new cmpF_cc_immCFNode(); |
2560 | node->_bottom_type = _leaf->bottom_type(); |
2561 | return node; |
2562 | } |
2563 | case cmpD_cc_reg_rule: { |
2564 | cmpD_cc_regNode *node = new cmpD_cc_regNode(); |
2565 | return node; |
2566 | } |
2567 | case cmpD_cc_reg_CF_rule: { |
2568 | cmpD_cc_reg_CFNode *node = new cmpD_cc_reg_CFNode(); |
2569 | return node; |
2570 | } |
2571 | case cmpD_cc_mem_rule: { |
2572 | cmpD_cc_memNode *node = new cmpD_cc_memNode(); |
2573 | return node; |
2574 | } |
2575 | case cmpD_cc_memCF_rule: { |
2576 | cmpD_cc_memCFNode *node = new cmpD_cc_memCFNode(); |
2577 | return node; |
2578 | } |
2579 | case cmpD_cc_imm_rule: { |
2580 | cmpD_cc_immNode *node = new cmpD_cc_immNode(); |
2581 | node->_bottom_type = _leaf->bottom_type(); |
2582 | return node; |
2583 | } |
2584 | case cmpD_cc_immCF_rule: { |
2585 | cmpD_cc_immCFNode *node = new cmpD_cc_immCFNode(); |
2586 | node->_bottom_type = _leaf->bottom_type(); |
2587 | return node; |
2588 | } |
2589 | case cmpF_reg_rule: { |
2590 | cmpF_regNode *node = new cmpF_regNode(); |
2591 | return node; |
2592 | } |
2593 | case cmpF_mem_rule: { |
2594 | cmpF_memNode *node = new cmpF_memNode(); |
2595 | return node; |
2596 | } |
2597 | case cmpF_imm_rule: { |
2598 | cmpF_immNode *node = new cmpF_immNode(); |
2599 | node->_bottom_type = _leaf->bottom_type(); |
2600 | return node; |
2601 | } |
2602 | case cmpD_reg_rule: { |
2603 | cmpD_regNode *node = new cmpD_regNode(); |
2604 | return node; |
2605 | } |
2606 | case cmpD_mem_rule: { |
2607 | cmpD_memNode *node = new cmpD_memNode(); |
2608 | return node; |
2609 | } |
2610 | case cmpD_imm_rule: { |
2611 | cmpD_immNode *node = new cmpD_immNode(); |
2612 | node->_bottom_type = _leaf->bottom_type(); |
2613 | return node; |
2614 | } |
2615 | case roundFloat_nop_rule: { |
2616 | roundFloat_nopNode *node = new roundFloat_nopNode(); |
2617 | return node; |
2618 | } |
2619 | case roundDouble_nop_rule: { |
2620 | roundDouble_nopNode *node = new roundDouble_nopNode(); |
2621 | return node; |
2622 | } |
2623 | case convF2D_reg_reg_rule: { |
2624 | convF2D_reg_regNode *node = new convF2D_reg_regNode(); |
2625 | return node; |
2626 | } |
2627 | case convF2D_reg_mem_rule: { |
2628 | convF2D_reg_memNode *node = new convF2D_reg_memNode(); |
2629 | return node; |
2630 | } |
2631 | case convD2F_reg_reg_rule: { |
2632 | convD2F_reg_regNode *node = new convD2F_reg_regNode(); |
2633 | return node; |
2634 | } |
2635 | case convD2F_reg_mem_rule: { |
2636 | convD2F_reg_memNode *node = new convD2F_reg_memNode(); |
2637 | return node; |
2638 | } |
2639 | case convF2I_reg_reg_rule: { |
2640 | convF2I_reg_regNode *node = new convF2I_reg_regNode(); |
2641 | return node; |
2642 | } |
2643 | case convF2L_reg_reg_rule: { |
2644 | convF2L_reg_regNode *node = new convF2L_reg_regNode(); |
2645 | return node; |
2646 | } |
2647 | case convD2I_reg_reg_rule: { |
2648 | convD2I_reg_regNode *node = new convD2I_reg_regNode(); |
2649 | return node; |
2650 | } |
2651 | case convD2L_reg_reg_rule: { |
2652 | convD2L_reg_regNode *node = new convD2L_reg_regNode(); |
2653 | return node; |
2654 | } |
2655 | case convI2F_reg_reg_rule: { |
2656 | convI2F_reg_regNode *node = new convI2F_reg_regNode(); |
2657 | return node; |
2658 | } |
2659 | case convI2F_reg_mem_rule: { |
2660 | convI2F_reg_memNode *node = new convI2F_reg_memNode(); |
2661 | return node; |
2662 | } |
2663 | case convI2D_reg_reg_rule: { |
2664 | convI2D_reg_regNode *node = new convI2D_reg_regNode(); |
2665 | return node; |
2666 | } |
2667 | case convI2D_reg_mem_rule: { |
2668 | convI2D_reg_memNode *node = new convI2D_reg_memNode(); |
2669 | return node; |
2670 | } |
2671 | case convXI2F_reg_rule: { |
2672 | convXI2F_regNode *node = new convXI2F_regNode(); |
2673 | return node; |
2674 | } |
2675 | case convXI2D_reg_rule: { |
2676 | convXI2D_regNode *node = new convXI2D_regNode(); |
2677 | return node; |
2678 | } |
2679 | case convL2F_reg_reg_rule: { |
2680 | convL2F_reg_regNode *node = new convL2F_reg_regNode(); |
2681 | return node; |
2682 | } |
2683 | case convL2F_reg_mem_rule: { |
2684 | convL2F_reg_memNode *node = new convL2F_reg_memNode(); |
2685 | return node; |
2686 | } |
2687 | case convL2D_reg_reg_rule: { |
2688 | convL2D_reg_regNode *node = new convL2D_reg_regNode(); |
2689 | return node; |
2690 | } |
2691 | case convL2D_reg_mem_rule: { |
2692 | convL2D_reg_memNode *node = new convL2D_reg_memNode(); |
2693 | return node; |
2694 | } |
2695 | case convI2L_reg_reg_rule: { |
2696 | convI2L_reg_regNode *node = new convI2L_reg_regNode(); |
2697 | return node; |
2698 | } |
2699 | case convI2L_reg_reg_zex_rule: { |
2700 | convI2L_reg_reg_zexNode *node = new convI2L_reg_reg_zexNode(); |
2701 | return node; |
2702 | } |
2703 | case convI2L_reg_mem_zex_rule: { |
2704 | convI2L_reg_mem_zexNode *node = new convI2L_reg_mem_zexNode(); |
2705 | return node; |
2706 | } |
2707 | case zerox_long_reg_reg_rule: { |
2708 | zerox_long_reg_regNode *node = new zerox_long_reg_regNode(); |
2709 | return node; |
2710 | } |
2711 | case convL2I_reg_reg_rule: { |
2712 | convL2I_reg_regNode *node = new convL2I_reg_regNode(); |
2713 | return node; |
2714 | } |
2715 | case MoveF2I_stack_reg_rule: { |
2716 | MoveF2I_stack_regNode *node = new MoveF2I_stack_regNode(); |
2717 | return node; |
2718 | } |
2719 | case MoveI2F_stack_reg_rule: { |
2720 | MoveI2F_stack_regNode *node = new MoveI2F_stack_regNode(); |
2721 | return node; |
2722 | } |
2723 | case MoveD2L_stack_reg_rule: { |
2724 | MoveD2L_stack_regNode *node = new MoveD2L_stack_regNode(); |
2725 | return node; |
2726 | } |
2727 | case MoveL2D_stack_reg_partial_rule: { |
2728 | MoveL2D_stack_reg_partialNode *node = new MoveL2D_stack_reg_partialNode(); |
2729 | return node; |
2730 | } |
2731 | case MoveL2D_stack_reg_rule: { |
2732 | MoveL2D_stack_regNode *node = new MoveL2D_stack_regNode(); |
2733 | return node; |
2734 | } |
2735 | case MoveF2I_reg_stack_rule: { |
2736 | MoveF2I_reg_stackNode *node = new MoveF2I_reg_stackNode(); |
2737 | return node; |
2738 | } |
2739 | case MoveI2F_reg_stack_rule: { |
2740 | MoveI2F_reg_stackNode *node = new MoveI2F_reg_stackNode(); |
2741 | return node; |
2742 | } |
2743 | case MoveD2L_reg_stack_rule: { |
2744 | MoveD2L_reg_stackNode *node = new MoveD2L_reg_stackNode(); |
2745 | return node; |
2746 | } |
2747 | case MoveL2D_reg_stack_rule: { |
2748 | MoveL2D_reg_stackNode *node = new MoveL2D_reg_stackNode(); |
2749 | return node; |
2750 | } |
2751 | case MoveF2I_reg_reg_rule: { |
2752 | MoveF2I_reg_regNode *node = new MoveF2I_reg_regNode(); |
2753 | return node; |
2754 | } |
2755 | case MoveD2L_reg_reg_rule: { |
2756 | MoveD2L_reg_regNode *node = new MoveD2L_reg_regNode(); |
2757 | return node; |
2758 | } |
2759 | case MoveI2F_reg_reg_rule: { |
2760 | MoveI2F_reg_regNode *node = new MoveI2F_reg_regNode(); |
2761 | return node; |
2762 | } |
2763 | case MoveL2D_reg_reg_rule: { |
2764 | MoveL2D_reg_regNode *node = new MoveL2D_reg_regNode(); |
2765 | return node; |
2766 | } |
2767 | case rep_stos_rule: { |
2768 | rep_stosNode *node = new rep_stosNode(); |
2769 | node->set_opnd_array(3, MachOperGenerator(REGD)); |
2770 | return node; |
2771 | } |
2772 | case rep_stos_large_rule: { |
2773 | rep_stos_largeNode *node = new rep_stos_largeNode(); |
2774 | node->set_opnd_array(3, MachOperGenerator(REGD)); |
2775 | return node; |
2776 | } |
2777 | case string_compareL_rule: { |
2778 | string_compareLNode *node = new string_compareLNode(); |
2779 | node->set_opnd_array(5, MachOperGenerator(LEGVECS)); |
2780 | return node; |
2781 | } |
2782 | case string_compareU_rule: { |
2783 | string_compareUNode *node = new string_compareUNode(); |
2784 | node->set_opnd_array(5, MachOperGenerator(LEGVECS)); |
2785 | return node; |
2786 | } |
2787 | case string_compareLU_rule: { |
2788 | string_compareLUNode *node = new string_compareLUNode(); |
2789 | node->set_opnd_array(5, MachOperGenerator(LEGVECS)); |
2790 | return node; |
2791 | } |
2792 | case string_compareUL_rule: { |
2793 | string_compareULNode *node = new string_compareULNode(); |
2794 | node->set_opnd_array(5, MachOperGenerator(LEGVECS)); |
2795 | return node; |
2796 | } |
2797 | case string_indexof_conL_rule: { |
2798 | string_indexof_conLNode *node = new string_indexof_conLNode(); |
2799 | node->set_opnd_array(5, MachOperGenerator(LEGVECS)); |
2800 | return node; |
2801 | } |
2802 | case string_indexof_conU_rule: { |
2803 | string_indexof_conUNode *node = new string_indexof_conUNode(); |
2804 | node->set_opnd_array(5, MachOperGenerator(LEGVECS)); |
2805 | return node; |
2806 | } |
2807 | case string_indexof_conUL_rule: { |
2808 | string_indexof_conULNode *node = new string_indexof_conULNode(); |
2809 | node->set_opnd_array(5, MachOperGenerator(LEGVECS)); |
2810 | return node; |
2811 | } |
2812 | case string_indexofL_rule: { |
2813 | string_indexofLNode *node = new string_indexofLNode(); |
2814 | node->set_opnd_array(5, MachOperGenerator(LEGVECS)); |
2815 | return node; |
2816 | } |
2817 | case string_indexofU_rule: { |
2818 | string_indexofUNode *node = new string_indexofUNode(); |
2819 | node->set_opnd_array(5, MachOperGenerator(LEGVECS)); |
2820 | return node; |
2821 | } |
2822 | case string_indexofUL_rule: { |
2823 | string_indexofULNode *node = new string_indexofULNode(); |
2824 | node->set_opnd_array(5, MachOperGenerator(LEGVECS)); |
2825 | return node; |
2826 | } |
2827 | case string_indexofU_char_rule: { |
2828 | string_indexofU_charNode *node = new string_indexofU_charNode(); |
2829 | node->set_opnd_array(4, MachOperGenerator(LEGVECS)); |
2830 | node->set_opnd_array(5, MachOperGenerator(LEGVECS)); |
2831 | node->set_opnd_array(6, MachOperGenerator(LEGVECS)); |
2832 | node->set_opnd_array(7, MachOperGenerator(RCX_REGI)); |
2833 | return node; |
2834 | } |
2835 | case string_equals_rule: { |
2836 | string_equalsNode *node = new string_equalsNode(); |
2837 | node->set_opnd_array(4, MachOperGenerator(LEGVECS)); |
2838 | node->set_opnd_array(5, MachOperGenerator(LEGVECS)); |
2839 | return node; |
2840 | } |
2841 | case array_equalsB_rule: { |
2842 | array_equalsBNode *node = new array_equalsBNode(); |
2843 | node->set_opnd_array(3, MachOperGenerator(LEGVECS)); |
2844 | node->set_opnd_array(4, MachOperGenerator(LEGVECS)); |
2845 | return node; |
2846 | } |
2847 | case array_equalsC_rule: { |
2848 | array_equalsCNode *node = new array_equalsCNode(); |
2849 | node->set_opnd_array(3, MachOperGenerator(LEGVECS)); |
2850 | node->set_opnd_array(4, MachOperGenerator(LEGVECS)); |
2851 | return node; |
2852 | } |
2853 | case has_negatives_rule: { |
2854 | has_negativesNode *node = new has_negativesNode(); |
2855 | node->set_opnd_array(3, MachOperGenerator(LEGVECS)); |
2856 | node->set_opnd_array(4, MachOperGenerator(LEGVECS)); |
2857 | return node; |
2858 | } |
2859 | case string_compress_rule: { |
2860 | string_compressNode *node = new string_compressNode(); |
2861 | node->set_opnd_array(4, MachOperGenerator(LEGVECS)); |
2862 | node->set_opnd_array(5, MachOperGenerator(LEGVECS)); |
2863 | node->set_opnd_array(6, MachOperGenerator(LEGVECS)); |
2864 | node->set_opnd_array(7, MachOperGenerator(LEGVECS)); |
2865 | return node; |
2866 | } |
2867 | case string_inflate_rule: { |
2868 | string_inflateNode *node = new string_inflateNode(); |
2869 | node->set_opnd_array(4, MachOperGenerator(LEGVECS)); |
2870 | node->set_opnd_array(5, MachOperGenerator(RCX_REGI)); |
2871 | return node; |
2872 | } |
2873 | case encode_iso_array_rule: { |
2874 | encode_iso_arrayNode *node = new encode_iso_arrayNode(); |
2875 | node->set_opnd_array(4, MachOperGenerator(LEGVECS)); |
2876 | node->set_opnd_array(5, MachOperGenerator(LEGVECS)); |
2877 | node->set_opnd_array(6, MachOperGenerator(LEGVECS)); |
2878 | node->set_opnd_array(7, MachOperGenerator(LEGVECS)); |
2879 | return node; |
2880 | } |
2881 | case overflowAddI_rReg_rule: { |
2882 | overflowAddI_rRegNode *node = new overflowAddI_rRegNode(); |
2883 | return node; |
2884 | } |
2885 | case overflowAddI_rReg_imm_rule: { |
2886 | overflowAddI_rReg_immNode *node = new overflowAddI_rReg_immNode(); |
2887 | return node; |
2888 | } |
2889 | case overflowAddL_rReg_rule: { |
2890 | overflowAddL_rRegNode *node = new overflowAddL_rRegNode(); |
2891 | return node; |
2892 | } |
2893 | case overflowAddL_rReg_imm_rule: { |
2894 | overflowAddL_rReg_immNode *node = new overflowAddL_rReg_immNode(); |
2895 | return node; |
2896 | } |
2897 | case overflowSubI_rReg_rule: { |
2898 | overflowSubI_rRegNode *node = new overflowSubI_rRegNode(); |
2899 | return node; |
2900 | } |
2901 | case overflowSubI_rReg_imm_rule: { |
2902 | overflowSubI_rReg_immNode *node = new overflowSubI_rReg_immNode(); |
2903 | return node; |
2904 | } |
2905 | case overflowSubL_rReg_rule: { |
2906 | overflowSubL_rRegNode *node = new overflowSubL_rRegNode(); |
2907 | return node; |
2908 | } |
2909 | case overflowSubL_rReg_imm_rule: { |
2910 | overflowSubL_rReg_immNode *node = new overflowSubL_rReg_immNode(); |
2911 | return node; |
2912 | } |
2913 | case overflowNegI_rReg_rule: { |
2914 | overflowNegI_rRegNode *node = new overflowNegI_rRegNode(); |
2915 | return node; |
2916 | } |
2917 | case overflowNegL_rReg_rule: { |
2918 | overflowNegL_rRegNode *node = new overflowNegL_rRegNode(); |
2919 | return node; |
2920 | } |
2921 | case overflowMulI_rReg_rule: { |
2922 | overflowMulI_rRegNode *node = new overflowMulI_rRegNode(); |
2923 | return node; |
2924 | } |
2925 | case overflowMulI_rReg_imm_rule: { |
2926 | overflowMulI_rReg_immNode *node = new overflowMulI_rReg_immNode(); |
2927 | node->set_opnd_array(3, MachOperGenerator(RREGI)); |
2928 | return node; |
2929 | } |
2930 | case overflowMulL_rReg_rule: { |
2931 | overflowMulL_rRegNode *node = new overflowMulL_rRegNode(); |
2932 | return node; |
2933 | } |
2934 | case overflowMulL_rReg_imm_rule: { |
2935 | overflowMulL_rReg_immNode *node = new overflowMulL_rReg_immNode(); |
2936 | node->set_opnd_array(3, MachOperGenerator(RREGL)); |
2937 | return node; |
2938 | } |
2939 | case compI_rReg_rule: { |
2940 | compI_rRegNode *node = new compI_rRegNode(); |
2941 | return node; |
2942 | } |
2943 | case compI_rReg_imm_rule: { |
2944 | compI_rReg_immNode *node = new compI_rReg_immNode(); |
2945 | return node; |
2946 | } |
2947 | case compI_rReg_mem_rule: { |
2948 | compI_rReg_memNode *node = new compI_rReg_memNode(); |
2949 | return node; |
2950 | } |
2951 | case testI_reg_rule: { |
2952 | testI_regNode *node = new testI_regNode(); |
2953 | return node; |
2954 | } |
2955 | case testI_reg_imm_rule: { |
2956 | testI_reg_immNode *node = new testI_reg_immNode(); |
2957 | return node; |
2958 | } |
2959 | case testI_reg_mem_rule: { |
2960 | testI_reg_memNode *node = new testI_reg_memNode(); |
2961 | return node; |
2962 | } |
2963 | case testI_reg_mem_0_rule: { |
2964 | testI_reg_mem_0Node *node = new testI_reg_mem_0Node(); |
2965 | return node; |
2966 | } |
2967 | case compU_rReg_rule: { |
2968 | compU_rRegNode *node = new compU_rRegNode(); |
2969 | return node; |
2970 | } |
2971 | case compU_rReg_imm_rule: { |
2972 | compU_rReg_immNode *node = new compU_rReg_immNode(); |
2973 | return node; |
2974 | } |
2975 | case compU_rReg_mem_rule: { |
2976 | compU_rReg_memNode *node = new compU_rReg_memNode(); |
2977 | return node; |
2978 | } |
2979 | case testU_reg_rule: { |
2980 | testU_regNode *node = new testU_regNode(); |
2981 | return node; |
2982 | } |
2983 | case compP_rReg_rule: { |
2984 | compP_rRegNode *node = new compP_rRegNode(); |
2985 | return node; |
2986 | } |
2987 | case compP_rReg_mem_rule: { |
2988 | compP_rReg_memNode *node = new compP_rReg_memNode(); |
2989 | return node; |
2990 | } |
2991 | case compP_mem_rReg_rule: { |
2992 | compP_mem_rRegNode *node = new compP_mem_rRegNode(); |
2993 | return node; |
2994 | } |
2995 | case testP_reg_rule: { |
2996 | testP_regNode *node = new testP_regNode(); |
2997 | return node; |
2998 | } |
2999 | case testP_mem_rule: { |
3000 | testP_memNode *node = new testP_memNode(); |
3001 | return node; |
3002 | } |
3003 | case testP_mem_reg0_rule: { |
3004 | testP_mem_reg0Node *node = new testP_mem_reg0Node(); |
3005 | return node; |
3006 | } |
3007 | case compN_rReg_rule: { |
3008 | compN_rRegNode *node = new compN_rRegNode(); |
3009 | return node; |
3010 | } |
3011 | case compN_rReg_mem_rule: { |
3012 | compN_rReg_memNode *node = new compN_rReg_memNode(); |
3013 | return node; |
3014 | } |
3015 | case compN_rReg_imm_rule: { |
3016 | compN_rReg_immNode *node = new compN_rReg_immNode(); |
3017 | return node; |
3018 | } |
3019 | case compN_mem_imm_rule: { |
3020 | compN_mem_immNode *node = new compN_mem_immNode(); |
3021 | return node; |
3022 | } |
3023 | case compN_rReg_imm_klass_rule: { |
3024 | compN_rReg_imm_klassNode *node = new compN_rReg_imm_klassNode(); |
3025 | return node; |
3026 | } |
3027 | case compN_mem_imm_klass_rule: { |
3028 | compN_mem_imm_klassNode *node = new compN_mem_imm_klassNode(); |
3029 | return node; |
3030 | } |
3031 | case testN_reg_rule: { |
3032 | testN_regNode *node = new testN_regNode(); |
3033 | return node; |
3034 | } |
3035 | case testN_mem_rule: { |
3036 | testN_memNode *node = new testN_memNode(); |
3037 | return node; |
3038 | } |
3039 | case testN_mem_reg0_rule: { |
3040 | testN_mem_reg0Node *node = new testN_mem_reg0Node(); |
3041 | return node; |
3042 | } |
3043 | case compL_rReg_rule: { |
3044 | compL_rRegNode *node = new compL_rRegNode(); |
3045 | return node; |
3046 | } |
3047 | case compL_rReg_imm_rule: { |
3048 | compL_rReg_immNode *node = new compL_rReg_immNode(); |
3049 | return node; |
3050 | } |
3051 | case compL_rReg_mem_rule: { |
3052 | compL_rReg_memNode *node = new compL_rReg_memNode(); |
3053 | return node; |
3054 | } |
3055 | case testL_reg_rule: { |
3056 | testL_regNode *node = new testL_regNode(); |
3057 | return node; |
3058 | } |
3059 | case testL_reg_imm_rule: { |
3060 | testL_reg_immNode *node = new testL_reg_immNode(); |
3061 | return node; |
3062 | } |
3063 | case testL_reg_mem_rule: { |
3064 | testL_reg_memNode *node = new testL_reg_memNode(); |
3065 | return node; |
3066 | } |
3067 | case testL_reg_mem_0_rule: { |
3068 | testL_reg_mem_0Node *node = new testL_reg_mem_0Node(); |
3069 | return node; |
3070 | } |
3071 | case testL_reg_mem2_rule: { |
3072 | testL_reg_mem2Node *node = new testL_reg_mem2Node(); |
3073 | return node; |
3074 | } |
3075 | case testL_reg_mem2_0_rule: { |
3076 | testL_reg_mem2_0Node *node = new testL_reg_mem2_0Node(); |
3077 | return node; |
3078 | } |
3079 | case cmpL3_reg_reg_rule: { |
3080 | cmpL3_reg_regNode *node = new cmpL3_reg_regNode(); |
3081 | return node; |
3082 | } |
3083 | case compUL_rReg_rule: { |
3084 | compUL_rRegNode *node = new compUL_rRegNode(); |
3085 | return node; |
3086 | } |
3087 | case compUL_rReg_imm_rule: { |
3088 | compUL_rReg_immNode *node = new compUL_rReg_immNode(); |
3089 | return node; |
3090 | } |
3091 | case compUL_rReg_mem_rule: { |
3092 | compUL_rReg_memNode *node = new compUL_rReg_memNode(); |
3093 | return node; |
3094 | } |
3095 | case testUL_reg_rule: { |
3096 | testUL_regNode *node = new testUL_regNode(); |
3097 | return node; |
3098 | } |
3099 | case compB_mem_imm_rule: { |
3100 | compB_mem_immNode *node = new compB_mem_immNode(); |
3101 | return node; |
3102 | } |
3103 | case testUB_mem_imm_rule: { |
3104 | testUB_mem_immNode *node = new testUB_mem_immNode(); |
3105 | return node; |
3106 | } |
3107 | case testB_mem_imm_rule: { |
3108 | testB_mem_immNode *node = new testB_mem_immNode(); |
3109 | return node; |
3110 | } |
3111 | case minI_rReg_rule: { |
3112 | minI_rRegNode *node = new minI_rRegNode(); |
3113 | return node; |
3114 | } |
3115 | case maxI_rReg_rule: { |
3116 | maxI_rRegNode *node = new maxI_rRegNode(); |
3117 | return node; |
3118 | } |
3119 | case jmpDir_rule: { |
3120 | jmpDirNode *node = new jmpDirNode(); |
3121 | node->set_opnd_array(1, MachOperGenerator(LABEL)); |
3122 | return node; |
3123 | } |
3124 | case jmpCon_rule: { |
3125 | jmpConNode *node = new jmpConNode(); |
3126 | node->set_opnd_array(3, MachOperGenerator(LABEL)); |
3127 | node->_prob = _leaf->as_If()->_prob; |
3128 | node->_fcnt = _leaf->as_If()->_fcnt; |
3129 | return node; |
3130 | } |
3131 | case jmpLoopEnd_rule: { |
3132 | jmpLoopEndNode *node = new jmpLoopEndNode(); |
3133 | node->set_opnd_array(3, MachOperGenerator(LABEL)); |
3134 | node->_prob = _leaf->as_If()->_prob; |
3135 | node->_fcnt = _leaf->as_If()->_fcnt; |
3136 | return node; |
3137 | } |
3138 | case jmpLoopEndU_rule: { |
3139 | jmpLoopEndUNode *node = new jmpLoopEndUNode(); |
3140 | node->set_opnd_array(3, MachOperGenerator(LABEL)); |
3141 | node->_prob = _leaf->as_If()->_prob; |
3142 | node->_fcnt = _leaf->as_If()->_fcnt; |
3143 | return node; |
3144 | } |
3145 | case jmpLoopEndUCF_rule: { |
3146 | jmpLoopEndUCFNode *node = new jmpLoopEndUCFNode(); |
3147 | node->set_opnd_array(3, MachOperGenerator(LABEL)); |
3148 | node->_prob = _leaf->as_If()->_prob; |
3149 | node->_fcnt = _leaf->as_If()->_fcnt; |
3150 | return node; |
3151 | } |
3152 | case jmpLoopEnd_and_restoreMask_rule: { |
3153 | jmpLoopEnd_and_restoreMaskNode *node = new jmpLoopEnd_and_restoreMaskNode(); |
3154 | node->set_opnd_array(3, MachOperGenerator(LABEL)); |
3155 | node->_prob = _leaf->as_If()->_prob; |
3156 | node->_fcnt = _leaf->as_If()->_fcnt; |
3157 | return node; |
3158 | } |
3159 | case jmpLoopEndU_and_restoreMask_rule: { |
3160 | jmpLoopEndU_and_restoreMaskNode *node = new jmpLoopEndU_and_restoreMaskNode(); |
3161 | node->set_opnd_array(3, MachOperGenerator(LABEL)); |
3162 | node->_prob = _leaf->as_If()->_prob; |
3163 | node->_fcnt = _leaf->as_If()->_fcnt; |
3164 | return node; |
3165 | } |
3166 | case jmpLoopEndUCF_and_restoreMask_rule: { |
3167 | jmpLoopEndUCF_and_restoreMaskNode *node = new jmpLoopEndUCF_and_restoreMaskNode(); |
3168 | node->set_opnd_array(3, MachOperGenerator(LABEL)); |
3169 | node->_prob = _leaf->as_If()->_prob; |
3170 | node->_fcnt = _leaf->as_If()->_fcnt; |
3171 | return node; |
3172 | } |
3173 | case jmpConU_rule: { |
3174 | jmpConUNode *node = new jmpConUNode(); |
3175 | node->set_opnd_array(3, MachOperGenerator(LABEL)); |
3176 | node->_prob = _leaf->as_If()->_prob; |
3177 | node->_fcnt = _leaf->as_If()->_fcnt; |
3178 | return node; |
3179 | } |
3180 | case jmpConUCF_rule: { |
3181 | jmpConUCFNode *node = new jmpConUCFNode(); |
3182 | node->set_opnd_array(3, MachOperGenerator(LABEL)); |
3183 | node->_prob = _leaf->as_If()->_prob; |
3184 | node->_fcnt = _leaf->as_If()->_fcnt; |
3185 | return node; |
3186 | } |
3187 | case jmpConUCF2_rule: { |
3188 | jmpConUCF2Node *node = new jmpConUCF2Node(); |
3189 | node->set_opnd_array(3, MachOperGenerator(LABEL)); |
3190 | node->_prob = _leaf->as_If()->_prob; |
3191 | node->_fcnt = _leaf->as_If()->_fcnt; |
3192 | return node; |
3193 | } |
3194 | case partialSubtypeCheck_rule: { |
3195 | partialSubtypeCheckNode *node = new partialSubtypeCheckNode(); |
3196 | return node; |
3197 | } |
3198 | case partialSubtypeCheck_vs_Zero_rule: { |
3199 | partialSubtypeCheck_vs_ZeroNode *node = new partialSubtypeCheck_vs_ZeroNode(); |
3200 | return node; |
3201 | } |
3202 | case jmpDir_short_rule: { |
3203 | jmpDir_shortNode *node = new jmpDir_shortNode(); |
3204 | node->set_opnd_array(1, MachOperGenerator(LABEL)); |
3205 | return node; |
3206 | } |
3207 | case jmpCon_short_rule: { |
3208 | jmpCon_shortNode *node = new jmpCon_shortNode(); |
3209 | node->set_opnd_array(3, MachOperGenerator(LABEL)); |
3210 | node->_prob = _leaf->as_If()->_prob; |
3211 | node->_fcnt = _leaf->as_If()->_fcnt; |
3212 | return node; |
3213 | } |
3214 | case jmpLoopEnd_short_rule: { |
3215 | jmpLoopEnd_shortNode *node = new jmpLoopEnd_shortNode(); |
3216 | node->set_opnd_array(3, MachOperGenerator(LABEL)); |
3217 | node->_prob = _leaf->as_If()->_prob; |
3218 | node->_fcnt = _leaf->as_If()->_fcnt; |
3219 | return node; |
3220 | } |
3221 | case jmpLoopEndU_short_rule: { |
3222 | jmpLoopEndU_shortNode *node = new jmpLoopEndU_shortNode(); |
3223 | node->set_opnd_array(3, MachOperGenerator(LABEL)); |
3224 | node->_prob = _leaf->as_If()->_prob; |
3225 | node->_fcnt = _leaf->as_If()->_fcnt; |
3226 | return node; |
3227 | } |
3228 | case jmpLoopEndUCF_short_rule: { |
3229 | jmpLoopEndUCF_shortNode *node = new jmpLoopEndUCF_shortNode(); |
3230 | node->set_opnd_array(3, MachOperGenerator(LABEL)); |
3231 | node->_prob = _leaf->as_If()->_prob; |
3232 | node->_fcnt = _leaf->as_If()->_fcnt; |
3233 | return node; |
3234 | } |
3235 | case jmpConU_short_rule: { |
3236 | jmpConU_shortNode *node = new jmpConU_shortNode(); |
3237 | node->set_opnd_array(3, MachOperGenerator(LABEL)); |
3238 | node->_prob = _leaf->as_If()->_prob; |
3239 | node->_fcnt = _leaf->as_If()->_fcnt; |
3240 | return node; |
3241 | } |
3242 | case jmpConUCF_short_rule: { |
3243 | jmpConUCF_shortNode *node = new jmpConUCF_shortNode(); |
3244 | node->set_opnd_array(3, MachOperGenerator(LABEL)); |
3245 | node->_prob = _leaf->as_If()->_prob; |
3246 | node->_fcnt = _leaf->as_If()->_fcnt; |
3247 | return node; |
3248 | } |
3249 | case jmpConUCF2_short_rule: { |
3250 | jmpConUCF2_shortNode *node = new jmpConUCF2_shortNode(); |
3251 | node->set_opnd_array(3, MachOperGenerator(LABEL)); |
3252 | node->_prob = _leaf->as_If()->_prob; |
3253 | node->_fcnt = _leaf->as_If()->_fcnt; |
3254 | return node; |
3255 | } |
3256 | case cmpFastLockRTM_rule: { |
3257 | cmpFastLockRTMNode *node = new cmpFastLockRTMNode(); |
3258 | node->set_opnd_array(3, MachOperGenerator(RAX_REGI)); |
3259 | node->set_opnd_array(4, MachOperGenerator(RDX_REGI)); |
3260 | node->set_opnd_array(5, MachOperGenerator(RREGI)); |
3261 | node->set_opnd_array(6, MachOperGenerator(RREGI)); |
3262 | node->_counters = _leaf->as_FastLock()->counters(); |
3263 | node->_rtm_counters = _leaf->as_FastLock()->rtm_counters(); |
3264 | node->_stack_rtm_counters = _leaf->as_FastLock()->stack_rtm_counters(); |
3265 | return node; |
3266 | } |
3267 | case cmpFastLock_rule: { |
3268 | cmpFastLockNode *node = new cmpFastLockNode(); |
3269 | node->set_opnd_array(3, MachOperGenerator(RAX_REGI)); |
3270 | node->set_opnd_array(4, MachOperGenerator(RREGP)); |
3271 | node->_counters = _leaf->as_FastLock()->counters(); |
3272 | node->_rtm_counters = _leaf->as_FastLock()->rtm_counters(); |
3273 | node->_stack_rtm_counters = _leaf->as_FastLock()->stack_rtm_counters(); |
3274 | return node; |
3275 | } |
3276 | case cmpFastUnlock_rule: { |
3277 | cmpFastUnlockNode *node = new cmpFastUnlockNode(); |
3278 | node->set_opnd_array(3, MachOperGenerator(RREGP)); |
3279 | return node; |
3280 | } |
3281 | case safePoint_poll_rule: { |
3282 | safePoint_pollNode *node = new safePoint_pollNode(); |
3283 | node->set_opnd_array(1, MachOperGenerator(RFLAGSREG)); |
3284 | return node; |
3285 | } |
3286 | case safePoint_poll_far_rule: { |
3287 | safePoint_poll_farNode *node = new safePoint_poll_farNode(); |
3288 | return node; |
3289 | } |
3290 | case safePoint_poll_tls_rule: { |
3291 | safePoint_poll_tlsNode *node = new safePoint_poll_tlsNode(); |
3292 | return node; |
3293 | } |
3294 | case CallStaticJavaDirect_rule: { |
3295 | CallStaticJavaDirectNode *node = new CallStaticJavaDirectNode(); |
3296 | node->set_opnd_array(1, MachOperGenerator(METHOD)); |
3297 | return node; |
3298 | } |
3299 | case CallDynamicJavaDirect_rule: { |
3300 | CallDynamicJavaDirectNode *node = new CallDynamicJavaDirectNode(); |
3301 | node->set_opnd_array(1, MachOperGenerator(METHOD)); |
3302 | return node; |
3303 | } |
3304 | case CallRuntimeDirect_rule: { |
3305 | CallRuntimeDirectNode *node = new CallRuntimeDirectNode(); |
3306 | node->set_opnd_array(1, MachOperGenerator(METHOD)); |
3307 | return node; |
3308 | } |
3309 | case CallLeafDirect_rule: { |
3310 | CallLeafDirectNode *node = new CallLeafDirectNode(); |
3311 | node->set_opnd_array(1, MachOperGenerator(METHOD)); |
3312 | return node; |
3313 | } |
3314 | case CallLeafNoFPDirect_rule: { |
3315 | CallLeafNoFPDirectNode *node = new CallLeafNoFPDirectNode(); |
3316 | node->set_opnd_array(1, MachOperGenerator(METHOD)); |
3317 | return node; |
3318 | } |
3319 | case Ret_rule: { |
3320 | RetNode *node = new RetNode(); |
3321 | return node; |
3322 | } |
3323 | case TailCalljmpInd_rule: { |
3324 | TailCalljmpIndNode *node = new TailCalljmpIndNode(); |
3325 | return node; |
3326 | } |
3327 | case tailjmpInd_rule: { |
3328 | tailjmpIndNode *node = new tailjmpIndNode(); |
3329 | return node; |
3330 | } |
3331 | case CreateException_rule: { |
3332 | CreateExceptionNode *node = new CreateExceptionNode(); |
3333 | node->_bottom_type = _leaf->bottom_type(); |
3334 | return node; |
3335 | } |
3336 | case RethrowException_rule: { |
3337 | RethrowExceptionNode *node = new RethrowExceptionNode(); |
3338 | return node; |
3339 | } |
3340 | case tlsLoadP_rule: { |
3341 | tlsLoadPNode *node = new tlsLoadPNode(); |
3342 | return node; |
3343 | } |
3344 | case ShouldNotReachHere_rule: { |
3345 | ShouldNotReachHereNode *node = new ShouldNotReachHereNode(); |
3346 | return node; |
3347 | } |
3348 | case setMask_rule: { |
3349 | setMaskNode *node = new setMaskNode(); |
3350 | node->set_opnd_array(2, MachOperGenerator(RREGI)); |
3351 | return node; |
3352 | } |
3353 | case addF_reg_rule: { |
3354 | addF_regNode *node = new addF_regNode(); |
3355 | return node; |
3356 | } |
3357 | case addF_mem_rule: { |
3358 | addF_memNode *node = new addF_memNode(); |
3359 | return node; |
3360 | } |
3361 | case addF_mem_0_rule: { |
3362 | addF_mem_0Node *node = new addF_mem_0Node(); |
3363 | return node; |
3364 | } |
3365 | case addF_imm_rule: { |
3366 | addF_immNode *node = new addF_immNode(); |
3367 | node->_bottom_type = _leaf->bottom_type(); |
3368 | return node; |
3369 | } |
3370 | case addF_reg_reg_rule: { |
3371 | addF_reg_regNode *node = new addF_reg_regNode(); |
3372 | return node; |
3373 | } |
3374 | case addF_reg_mem_rule: { |
3375 | addF_reg_memNode *node = new addF_reg_memNode(); |
3376 | return node; |
3377 | } |
3378 | case addF_reg_mem_0_rule: { |
3379 | addF_reg_mem_0Node *node = new addF_reg_mem_0Node(); |
3380 | return node; |
3381 | } |
3382 | case addF_reg_imm_rule: { |
3383 | addF_reg_immNode *node = new addF_reg_immNode(); |
3384 | node->_bottom_type = _leaf->bottom_type(); |
3385 | return node; |
3386 | } |
3387 | case addD_reg_rule: { |
3388 | addD_regNode *node = new addD_regNode(); |
3389 | return node; |
3390 | } |
3391 | case addD_mem_rule: { |
3392 | addD_memNode *node = new addD_memNode(); |
3393 | return node; |
3394 | } |
3395 | case addD_mem_0_rule: { |
3396 | addD_mem_0Node *node = new addD_mem_0Node(); |
3397 | return node; |
3398 | } |
3399 | case addD_imm_rule: { |
3400 | addD_immNode *node = new addD_immNode(); |
3401 | node->_bottom_type = _leaf->bottom_type(); |
3402 | return node; |
3403 | } |
3404 | case addD_reg_reg_rule: { |
3405 | addD_reg_regNode *node = new addD_reg_regNode(); |
3406 | return node; |
3407 | } |
3408 | case addD_reg_mem_rule: { |
3409 | addD_reg_memNode *node = new addD_reg_memNode(); |
3410 | return node; |
3411 | } |
3412 | case addD_reg_mem_0_rule: { |
3413 | addD_reg_mem_0Node *node = new addD_reg_mem_0Node(); |
3414 | return node; |
3415 | } |
3416 | case addD_reg_imm_rule: { |
3417 | addD_reg_immNode *node = new addD_reg_immNode(); |
3418 | node->_bottom_type = _leaf->bottom_type(); |
3419 | return node; |
3420 | } |
3421 | case subF_reg_rule: { |
3422 | subF_regNode *node = new subF_regNode(); |
3423 | return node; |
3424 | } |
3425 | case subF_mem_rule: { |
3426 | subF_memNode *node = new subF_memNode(); |
3427 | return node; |
3428 | } |
3429 | case subF_imm_rule: { |
3430 | subF_immNode *node = new subF_immNode(); |
3431 | node->_bottom_type = _leaf->bottom_type(); |
3432 | return node; |
3433 | } |
3434 | case subF_reg_reg_rule: { |
3435 | subF_reg_regNode *node = new subF_reg_regNode(); |
3436 | return node; |
3437 | } |
3438 | case subF_reg_mem_rule: { |
3439 | subF_reg_memNode *node = new subF_reg_memNode(); |
3440 | return node; |
3441 | } |
3442 | case subF_reg_imm_rule: { |
3443 | subF_reg_immNode *node = new subF_reg_immNode(); |
3444 | node->_bottom_type = _leaf->bottom_type(); |
3445 | return node; |
3446 | } |
3447 | case subD_reg_rule: { |
3448 | subD_regNode *node = new subD_regNode(); |
3449 | return node; |
3450 | } |
3451 | case subD_mem_rule: { |
3452 | subD_memNode *node = new subD_memNode(); |
3453 | return node; |
3454 | } |
3455 | case subD_imm_rule: { |
3456 | subD_immNode *node = new subD_immNode(); |
3457 | node->_bottom_type = _leaf->bottom_type(); |
3458 | return node; |
3459 | } |
3460 | case subD_reg_reg_rule: { |
3461 | subD_reg_regNode *node = new subD_reg_regNode(); |
3462 | return node; |
3463 | } |
3464 | case subD_reg_mem_rule: { |
3465 | subD_reg_memNode *node = new subD_reg_memNode(); |
3466 | return node; |
3467 | } |
3468 | case subD_reg_imm_rule: { |
3469 | subD_reg_immNode *node = new subD_reg_immNode(); |
3470 | node->_bottom_type = _leaf->bottom_type(); |
3471 | return node; |
3472 | } |
3473 | case mulF_reg_rule: { |
3474 | mulF_regNode *node = new mulF_regNode(); |
3475 | return node; |
3476 | } |
3477 | case mulF_mem_rule: { |
3478 | mulF_memNode *node = new mulF_memNode(); |
3479 | return node; |
3480 | } |
3481 | case mulF_mem_0_rule: { |
3482 | mulF_mem_0Node *node = new mulF_mem_0Node(); |
3483 | return node; |
3484 | } |
3485 | case mulF_imm_rule: { |
3486 | mulF_immNode *node = new mulF_immNode(); |
3487 | node->_bottom_type = _leaf->bottom_type(); |
3488 | return node; |
3489 | } |
3490 | case mulF_reg_reg_rule: { |
3491 | mulF_reg_regNode *node = new mulF_reg_regNode(); |
3492 | return node; |
3493 | } |
3494 | case mulF_reg_mem_rule: { |
3495 | mulF_reg_memNode *node = new mulF_reg_memNode(); |
3496 | return node; |
3497 | } |
3498 | case mulF_reg_mem_0_rule: { |
3499 | mulF_reg_mem_0Node *node = new mulF_reg_mem_0Node(); |
3500 | return node; |
3501 | } |
3502 | case mulF_reg_imm_rule: { |
3503 | mulF_reg_immNode *node = new mulF_reg_immNode(); |
3504 | node->_bottom_type = _leaf->bottom_type(); |
3505 | return node; |
3506 | } |
3507 | case mulD_reg_rule: { |
3508 | mulD_regNode *node = new mulD_regNode(); |
3509 | return node; |
3510 | } |
3511 | case mulD_mem_rule: { |
3512 | mulD_memNode *node = new mulD_memNode(); |
3513 | return node; |
3514 | } |
3515 | case mulD_mem_0_rule: { |
3516 | mulD_mem_0Node *node = new mulD_mem_0Node(); |
3517 | return node; |
3518 | } |
3519 | case mulD_imm_rule: { |
3520 | mulD_immNode *node = new mulD_immNode(); |
3521 | node->_bottom_type = _leaf->bottom_type(); |
3522 | return node; |
3523 | } |
3524 | case mulD_reg_reg_rule: { |
3525 | mulD_reg_regNode *node = new mulD_reg_regNode(); |
3526 | return node; |
3527 | } |
3528 | case mulD_reg_mem_rule: { |
3529 | mulD_reg_memNode *node = new mulD_reg_memNode(); |
3530 | return node; |
3531 | } |
3532 | case mulD_reg_mem_0_rule: { |
3533 | mulD_reg_mem_0Node *node = new mulD_reg_mem_0Node(); |
3534 | return node; |
3535 | } |
3536 | case mulD_reg_imm_rule: { |
3537 | mulD_reg_immNode *node = new mulD_reg_immNode(); |
3538 | node->_bottom_type = _leaf->bottom_type(); |
3539 | return node; |
3540 | } |
3541 | case divF_reg_rule: { |
3542 | divF_regNode *node = new divF_regNode(); |
3543 | return node; |
3544 | } |
3545 | case divF_mem_rule: { |
3546 | divF_memNode *node = new divF_memNode(); |
3547 | return node; |
3548 | } |
3549 | case divF_imm_rule: { |
3550 | divF_immNode *node = new divF_immNode(); |
3551 | node->_bottom_type = _leaf->bottom_type(); |
3552 | return node; |
3553 | } |
3554 | case divF_reg_reg_rule: { |
3555 | divF_reg_regNode *node = new divF_reg_regNode(); |
3556 | return node; |
3557 | } |
3558 | case divF_reg_mem_rule: { |
3559 | divF_reg_memNode *node = new divF_reg_memNode(); |
3560 | return node; |
3561 | } |
3562 | case divF_reg_imm_rule: { |
3563 | divF_reg_immNode *node = new divF_reg_immNode(); |
3564 | node->_bottom_type = _leaf->bottom_type(); |
3565 | return node; |
3566 | } |
3567 | case divD_reg_rule: { |
3568 | divD_regNode *node = new divD_regNode(); |
3569 | return node; |
3570 | } |
3571 | case divD_mem_rule: { |
3572 | divD_memNode *node = new divD_memNode(); |
3573 | return node; |
3574 | } |
3575 | case divD_imm_rule: { |
3576 | divD_immNode *node = new divD_immNode(); |
3577 | node->_bottom_type = _leaf->bottom_type(); |
3578 | return node; |
3579 | } |
3580 | case divD_reg_reg_rule: { |
3581 | divD_reg_regNode *node = new divD_reg_regNode(); |
3582 | return node; |
3583 | } |
3584 | case divD_reg_mem_rule: { |
3585 | divD_reg_memNode *node = new divD_reg_memNode(); |
3586 | return node; |
3587 | } |
3588 | case divD_reg_imm_rule: { |
3589 | divD_reg_immNode *node = new divD_reg_immNode(); |
3590 | node->_bottom_type = _leaf->bottom_type(); |
3591 | return node; |
3592 | } |
3593 | case absF_reg_rule: { |
3594 | absF_regNode *node = new absF_regNode(); |
3595 | return node; |
3596 | } |
3597 | case absF_reg_reg_rule: { |
3598 | absF_reg_regNode *node = new absF_reg_regNode(); |
3599 | return node; |
3600 | } |
3601 | case absD_reg_rule: { |
3602 | absD_regNode *node = new absD_regNode(); |
3603 | return node; |
3604 | } |
3605 | case absD_reg_reg_rule: { |
3606 | absD_reg_regNode *node = new absD_reg_regNode(); |
3607 | return node; |
3608 | } |
3609 | case negF_reg_rule: { |
3610 | negF_regNode *node = new negF_regNode(); |
3611 | return node; |
3612 | } |
3613 | case negF_reg_reg_rule: { |
3614 | negF_reg_regNode *node = new negF_reg_regNode(); |
3615 | return node; |
3616 | } |
3617 | case negD_reg_rule: { |
3618 | negD_regNode *node = new negD_regNode(); |
3619 | return node; |
3620 | } |
3621 | case negD_reg_reg_rule: { |
3622 | negD_reg_regNode *node = new negD_reg_regNode(); |
3623 | return node; |
3624 | } |
3625 | case sqrtF_reg_rule: { |
3626 | sqrtF_regNode *node = new sqrtF_regNode(); |
3627 | return node; |
3628 | } |
3629 | case sqrtF_mem_rule: { |
3630 | sqrtF_memNode *node = new sqrtF_memNode(); |
3631 | return node; |
3632 | } |
3633 | case sqrtF_imm_rule: { |
3634 | sqrtF_immNode *node = new sqrtF_immNode(); |
3635 | node->_bottom_type = _leaf->bottom_type(); |
3636 | return node; |
3637 | } |
3638 | case sqrtD_reg_rule: { |
3639 | sqrtD_regNode *node = new sqrtD_regNode(); |
3640 | return node; |
3641 | } |
3642 | case sqrtD_mem_rule: { |
3643 | sqrtD_memNode *node = new sqrtD_memNode(); |
3644 | return node; |
3645 | } |
3646 | case sqrtD_imm_rule: { |
3647 | sqrtD_immNode *node = new sqrtD_immNode(); |
3648 | node->_bottom_type = _leaf->bottom_type(); |
3649 | return node; |
3650 | } |
3651 | case onspinwait_rule: { |
3652 | onspinwaitNode *node = new onspinwaitNode(); |
3653 | return node; |
3654 | } |
3655 | case fmaD_reg_rule: { |
3656 | fmaD_regNode *node = new fmaD_regNode(); |
3657 | return node; |
3658 | } |
3659 | case fmaF_reg_rule: { |
3660 | fmaF_regNode *node = new fmaF_regNode(); |
3661 | return node; |
3662 | } |
3663 | case loadV4_rule: { |
3664 | loadV4Node *node = new loadV4Node(); |
3665 | node->_bottom_type = _leaf->bottom_type(); |
3666 | return node; |
3667 | } |
3668 | case MoveVecS2Leg_rule: { |
3669 | MoveVecS2LegNode *node = new MoveVecS2LegNode(); |
3670 | return node; |
3671 | } |
3672 | case MoveLeg2VecS_rule: { |
3673 | MoveLeg2VecSNode *node = new MoveLeg2VecSNode(); |
3674 | return node; |
3675 | } |
3676 | case loadV8_rule: { |
3677 | loadV8Node *node = new loadV8Node(); |
3678 | node->_bottom_type = _leaf->bottom_type(); |
3679 | return node; |
3680 | } |
3681 | case MoveVecD2Leg_rule: { |
3682 | MoveVecD2LegNode *node = new MoveVecD2LegNode(); |
3683 | return node; |
3684 | } |
3685 | case MoveLeg2VecD_rule: { |
3686 | MoveLeg2VecDNode *node = new MoveLeg2VecDNode(); |
3687 | return node; |
3688 | } |
3689 | case loadV16_rule: { |
3690 | loadV16Node *node = new loadV16Node(); |
3691 | node->_bottom_type = _leaf->bottom_type(); |
3692 | return node; |
3693 | } |
3694 | case MoveVecX2Leg_rule: { |
3695 | MoveVecX2LegNode *node = new MoveVecX2LegNode(); |
3696 | return node; |
3697 | } |
3698 | case MoveLeg2VecX_rule: { |
3699 | MoveLeg2VecXNode *node = new MoveLeg2VecXNode(); |
3700 | return node; |
3701 | } |
3702 | case loadV32_rule: { |
3703 | loadV32Node *node = new loadV32Node(); |
3704 | node->_bottom_type = _leaf->bottom_type(); |
3705 | return node; |
3706 | } |
3707 | case MoveVecY2Leg_rule: { |
3708 | MoveVecY2LegNode *node = new MoveVecY2LegNode(); |
3709 | return node; |
3710 | } |
3711 | case MoveLeg2VecY_rule: { |
3712 | MoveLeg2VecYNode *node = new MoveLeg2VecYNode(); |
3713 | return node; |
3714 | } |
3715 | case loadV64_dword_rule: { |
3716 | loadV64_dwordNode *node = new loadV64_dwordNode(); |
3717 | node->_bottom_type = _leaf->bottom_type(); |
3718 | return node; |
3719 | } |
3720 | case loadV64_qword_rule: { |
3721 | loadV64_qwordNode *node = new loadV64_qwordNode(); |
3722 | node->_bottom_type = _leaf->bottom_type(); |
3723 | return node; |
3724 | } |
3725 | case MoveVecZ2Leg_rule: { |
3726 | MoveVecZ2LegNode *node = new MoveVecZ2LegNode(); |
3727 | return node; |
3728 | } |
3729 | case MoveLeg2VecZ_rule: { |
3730 | MoveLeg2VecZNode *node = new MoveLeg2VecZNode(); |
3731 | return node; |
3732 | } |
3733 | case storeV4_rule: { |
3734 | storeV4Node *node = new storeV4Node(); |
3735 | node->_bottom_type = _leaf->bottom_type(); |
3736 | return node; |
3737 | } |
3738 | case storeV8_rule: { |
3739 | storeV8Node *node = new storeV8Node(); |
3740 | node->_bottom_type = _leaf->bottom_type(); |
3741 | return node; |
3742 | } |
3743 | case storeV16_rule: { |
3744 | storeV16Node *node = new storeV16Node(); |
3745 | node->_bottom_type = _leaf->bottom_type(); |
3746 | return node; |
3747 | } |
3748 | case storeV32_rule: { |
3749 | storeV32Node *node = new storeV32Node(); |
3750 | node->_bottom_type = _leaf->bottom_type(); |
3751 | return node; |
3752 | } |
3753 | case storeV64_dword_rule: { |
3754 | storeV64_dwordNode *node = new storeV64_dwordNode(); |
3755 | node->_bottom_type = _leaf->bottom_type(); |
3756 | return node; |
3757 | } |
3758 | case storeV64_qword_rule: { |
3759 | storeV64_qwordNode *node = new storeV64_qwordNode(); |
3760 | node->_bottom_type = _leaf->bottom_type(); |
3761 | return node; |
3762 | } |
3763 | case Repl16B_rule: { |
3764 | Repl16BNode *node = new Repl16BNode(); |
3765 | node->_bottom_type = _leaf->bottom_type(); |
3766 | return node; |
3767 | } |
3768 | case Repl32B_rule: { |
3769 | Repl32BNode *node = new Repl32BNode(); |
3770 | node->_bottom_type = _leaf->bottom_type(); |
3771 | return node; |
3772 | } |
3773 | case Repl64B_rule: { |
3774 | Repl64BNode *node = new Repl64BNode(); |
3775 | node->_bottom_type = _leaf->bottom_type(); |
3776 | return node; |
3777 | } |
3778 | case Repl16B_imm_rule: { |
3779 | Repl16B_immNode *node = new Repl16B_immNode(); |
3780 | node->_bottom_type = _leaf->bottom_type(); |
3781 | return node; |
3782 | } |
3783 | case Repl32B_imm_rule: { |
3784 | Repl32B_immNode *node = new Repl32B_immNode(); |
3785 | node->_bottom_type = _leaf->bottom_type(); |
3786 | return node; |
3787 | } |
3788 | case Repl64B_imm_rule: { |
3789 | Repl64B_immNode *node = new Repl64B_immNode(); |
3790 | node->_bottom_type = _leaf->bottom_type(); |
3791 | return node; |
3792 | } |
3793 | case Repl4S_rule: { |
3794 | Repl4SNode *node = new Repl4SNode(); |
3795 | node->_bottom_type = _leaf->bottom_type(); |
3796 | return node; |
3797 | } |
3798 | case Repl4S_mem_rule: { |
3799 | Repl4S_memNode *node = new Repl4S_memNode(); |
3800 | node->_bottom_type = _leaf->bottom_type(); |
3801 | return node; |
3802 | } |
3803 | case Repl8S_rule: { |
3804 | Repl8SNode *node = new Repl8SNode(); |
3805 | node->_bottom_type = _leaf->bottom_type(); |
3806 | return node; |
3807 | } |
3808 | case Repl8S_mem_rule: { |
3809 | Repl8S_memNode *node = new Repl8S_memNode(); |
3810 | node->_bottom_type = _leaf->bottom_type(); |
3811 | return node; |
3812 | } |
3813 | case Repl8S_imm_rule: { |
3814 | Repl8S_immNode *node = new Repl8S_immNode(); |
3815 | node->_bottom_type = _leaf->bottom_type(); |
3816 | return node; |
3817 | } |
3818 | case Repl16S_rule: { |
3819 | Repl16SNode *node = new Repl16SNode(); |
3820 | node->_bottom_type = _leaf->bottom_type(); |
3821 | return node; |
3822 | } |
3823 | case Repl16S_mem_rule: { |
3824 | Repl16S_memNode *node = new Repl16S_memNode(); |
3825 | node->_bottom_type = _leaf->bottom_type(); |
3826 | return node; |
3827 | } |
3828 | case Repl16S_imm_rule: { |
3829 | Repl16S_immNode *node = new Repl16S_immNode(); |
3830 | node->_bottom_type = _leaf->bottom_type(); |
3831 | return node; |
3832 | } |
3833 | case Repl32S_rule: { |
3834 | Repl32SNode *node = new Repl32SNode(); |
3835 | node->_bottom_type = _leaf->bottom_type(); |
3836 | return node; |
3837 | } |
3838 | case Repl32S_mem_rule: { |
3839 | Repl32S_memNode *node = new Repl32S_memNode(); |
3840 | node->_bottom_type = _leaf->bottom_type(); |
3841 | return node; |
3842 | } |
3843 | case Repl32S_imm_rule: { |
3844 | Repl32S_immNode *node = new Repl32S_immNode(); |
3845 | node->_bottom_type = _leaf->bottom_type(); |
3846 | return node; |
3847 | } |
3848 | case Repl4I_rule: { |
3849 | Repl4INode *node = new Repl4INode(); |
3850 | node->_bottom_type = _leaf->bottom_type(); |
3851 | return node; |
3852 | } |
3853 | case Repl4I_mem_rule: { |
3854 | Repl4I_memNode *node = new Repl4I_memNode(); |
3855 | node->_bottom_type = _leaf->bottom_type(); |
3856 | return node; |
3857 | } |
3858 | case Repl8I_rule: { |
3859 | Repl8INode *node = new Repl8INode(); |
3860 | node->_bottom_type = _leaf->bottom_type(); |
3861 | return node; |
3862 | } |
3863 | case Repl8I_mem_rule: { |
3864 | Repl8I_memNode *node = new Repl8I_memNode(); |
3865 | node->_bottom_type = _leaf->bottom_type(); |
3866 | return node; |
3867 | } |
3868 | case Repl16I_rule: { |
3869 | Repl16INode *node = new Repl16INode(); |
3870 | node->_bottom_type = _leaf->bottom_type(); |
3871 | return node; |
3872 | } |
3873 | case Repl16I_mem_rule: { |
3874 | Repl16I_memNode *node = new Repl16I_memNode(); |
3875 | node->_bottom_type = _leaf->bottom_type(); |
3876 | return node; |
3877 | } |
3878 | case Repl4I_imm_rule: { |
3879 | Repl4I_immNode *node = new Repl4I_immNode(); |
3880 | node->_bottom_type = _leaf->bottom_type(); |
3881 | return node; |
3882 | } |
3883 | case Repl8I_imm_rule: { |
3884 | Repl8I_immNode *node = new Repl8I_immNode(); |
3885 | node->_bottom_type = _leaf->bottom_type(); |
3886 | return node; |
3887 | } |
3888 | case Repl16I_imm_rule: { |
3889 | Repl16I_immNode *node = new Repl16I_immNode(); |
3890 | node->_bottom_type = _leaf->bottom_type(); |
3891 | return node; |
3892 | } |
3893 | case Repl2L_mem_rule: { |
3894 | Repl2L_memNode *node = new Repl2L_memNode(); |
3895 | node->_bottom_type = _leaf->bottom_type(); |
3896 | return node; |
3897 | } |
3898 | case Repl4L_rule: { |
3899 | Repl4LNode *node = new Repl4LNode(); |
3900 | node->_bottom_type = _leaf->bottom_type(); |
3901 | return node; |
3902 | } |
3903 | case Repl8L_rule: { |
3904 | Repl8LNode *node = new Repl8LNode(); |
3905 | node->_bottom_type = _leaf->bottom_type(); |
3906 | return node; |
3907 | } |
3908 | case Repl4L_imm_rule: { |
3909 | Repl4L_immNode *node = new Repl4L_immNode(); |
3910 | node->_bottom_type = _leaf->bottom_type(); |
3911 | return node; |
3912 | } |
3913 | case Repl8L_imm_rule: { |
3914 | Repl8L_immNode *node = new Repl8L_immNode(); |
3915 | node->_bottom_type = _leaf->bottom_type(); |
3916 | return node; |
3917 | } |
3918 | case Repl4L_mem_rule: { |
3919 | Repl4L_memNode *node = new Repl4L_memNode(); |
3920 | node->_bottom_type = _leaf->bottom_type(); |
3921 | return node; |
3922 | } |
3923 | case Repl8L_mem_rule: { |
3924 | Repl8L_memNode *node = new Repl8L_memNode(); |
3925 | node->_bottom_type = _leaf->bottom_type(); |
3926 | return node; |
3927 | } |
3928 | case Repl2F_mem_rule: { |
3929 | Repl2F_memNode *node = new Repl2F_memNode(); |
3930 | node->_bottom_type = _leaf->bottom_type(); |
3931 | return node; |
3932 | } |
3933 | case Repl4F_mem_rule: { |
3934 | Repl4F_memNode *node = new Repl4F_memNode(); |
3935 | node->_bottom_type = _leaf->bottom_type(); |
3936 | return node; |
3937 | } |
3938 | case Repl8F_rule: { |
3939 | Repl8FNode *node = new Repl8FNode(); |
3940 | node->_bottom_type = _leaf->bottom_type(); |
3941 | return node; |
3942 | } |
3943 | case Repl8F_mem_rule: { |
3944 | Repl8F_memNode *node = new Repl8F_memNode(); |
3945 | node->_bottom_type = _leaf->bottom_type(); |
3946 | return node; |
3947 | } |
3948 | case Repl16F_rule: { |
3949 | Repl16FNode *node = new Repl16FNode(); |
3950 | node->_bottom_type = _leaf->bottom_type(); |
3951 | return node; |
3952 | } |
3953 | case Repl16F_mem_rule: { |
3954 | Repl16F_memNode *node = new Repl16F_memNode(); |
3955 | node->_bottom_type = _leaf->bottom_type(); |
3956 | return node; |
3957 | } |
3958 | case Repl2F_zero_rule: { |
3959 | Repl2F_zeroNode *node = new Repl2F_zeroNode(); |
3960 | node->_bottom_type = _leaf->bottom_type(); |
3961 | return node; |
3962 | } |
3963 | case Repl4F_zero_rule: { |
3964 | Repl4F_zeroNode *node = new Repl4F_zeroNode(); |
3965 | node->_bottom_type = _leaf->bottom_type(); |
3966 | return node; |
3967 | } |
3968 | case Repl8F_zero_rule: { |
3969 | Repl8F_zeroNode *node = new Repl8F_zeroNode(); |
3970 | node->_bottom_type = _leaf->bottom_type(); |
3971 | return node; |
3972 | } |
3973 | case Repl2D_mem_rule: { |
3974 | Repl2D_memNode *node = new Repl2D_memNode(); |
3975 | node->_bottom_type = _leaf->bottom_type(); |
3976 | return node; |
3977 | } |
3978 | case Repl4D_rule: { |
3979 | Repl4DNode *node = new Repl4DNode(); |
3980 | node->_bottom_type = _leaf->bottom_type(); |
3981 | return node; |
3982 | } |
3983 | case Repl4D_mem_rule: { |
3984 | Repl4D_memNode *node = new Repl4D_memNode(); |
3985 | node->_bottom_type = _leaf->bottom_type(); |
3986 | return node; |
3987 | } |
3988 | case Repl8D_rule: { |
3989 | Repl8DNode *node = new Repl8DNode(); |
3990 | node->_bottom_type = _leaf->bottom_type(); |
3991 | return node; |
3992 | } |
3993 | case Repl8D_mem_rule: { |
3994 | Repl8D_memNode *node = new Repl8D_memNode(); |
3995 | node->_bottom_type = _leaf->bottom_type(); |
3996 | return node; |
3997 | } |
3998 | case Repl2D_zero_rule: { |
3999 | Repl2D_zeroNode *node = new Repl2D_zeroNode(); |
4000 | node->_bottom_type = _leaf->bottom_type(); |
4001 | return node; |
4002 | } |
4003 | case Repl4D_zero_rule: { |
4004 | Repl4D_zeroNode *node = new Repl4D_zeroNode(); |
4005 | node->_bottom_type = _leaf->bottom_type(); |
4006 | return node; |
4007 | } |
4008 | case Repl4B_rule: { |
4009 | Repl4BNode *node = new Repl4BNode(); |
4010 | node->_bottom_type = _leaf->bottom_type(); |
4011 | return node; |
4012 | } |
4013 | case Repl8B_rule: { |
4014 | Repl8BNode *node = new Repl8BNode(); |
4015 | node->_bottom_type = _leaf->bottom_type(); |
4016 | return node; |
4017 | } |
4018 | case Repl4B_imm_rule: { |
4019 | Repl4B_immNode *node = new Repl4B_immNode(); |
4020 | node->_bottom_type = _leaf->bottom_type(); |
4021 | return node; |
4022 | } |
4023 | case Repl8B_imm_rule: { |
4024 | Repl8B_immNode *node = new Repl8B_immNode(); |
4025 | node->_bottom_type = _leaf->bottom_type(); |
4026 | return node; |
4027 | } |
4028 | case Repl4B_zero_rule: { |
4029 | Repl4B_zeroNode *node = new Repl4B_zeroNode(); |
4030 | node->_bottom_type = _leaf->bottom_type(); |
4031 | return node; |
4032 | } |
4033 | case Repl8B_zero_rule: { |
4034 | Repl8B_zeroNode *node = new Repl8B_zeroNode(); |
4035 | node->_bottom_type = _leaf->bottom_type(); |
4036 | return node; |
4037 | } |
4038 | case Repl16B_zero_rule: { |
4039 | Repl16B_zeroNode *node = new Repl16B_zeroNode(); |
4040 | node->_bottom_type = _leaf->bottom_type(); |
4041 | return node; |
4042 | } |
4043 | case Repl32B_zero_rule: { |
4044 | Repl32B_zeroNode *node = new Repl32B_zeroNode(); |
4045 | node->_bottom_type = _leaf->bottom_type(); |
4046 | return node; |
4047 | } |
4048 | case Repl2S_rule: { |
4049 | Repl2SNode *node = new Repl2SNode(); |
4050 | node->_bottom_type = _leaf->bottom_type(); |
4051 | return node; |
4052 | } |
4053 | case Repl2S_imm_rule: { |
4054 | Repl2S_immNode *node = new Repl2S_immNode(); |
4055 | node->_bottom_type = _leaf->bottom_type(); |
4056 | return node; |
4057 | } |
4058 | case Repl4S_imm_rule: { |
4059 | Repl4S_immNode *node = new Repl4S_immNode(); |
4060 | node->_bottom_type = _leaf->bottom_type(); |
4061 | return node; |
4062 | } |
4063 | case Repl2S_zero_rule: { |
4064 | Repl2S_zeroNode *node = new Repl2S_zeroNode(); |
4065 | node->_bottom_type = _leaf->bottom_type(); |
4066 | return node; |
4067 | } |
4068 | case Repl4S_zero_rule: { |
4069 | Repl4S_zeroNode *node = new Repl4S_zeroNode(); |
4070 | node->_bottom_type = _leaf->bottom_type(); |
4071 | return node; |
4072 | } |
4073 | case Repl8S_zero_rule: { |
4074 | Repl8S_zeroNode *node = new Repl8S_zeroNode(); |
4075 | node->_bottom_type = _leaf->bottom_type(); |
4076 | return node; |
4077 | } |
4078 | case Repl16S_zero_rule: { |
4079 | Repl16S_zeroNode *node = new Repl16S_zeroNode(); |
4080 | node->_bottom_type = _leaf->bottom_type(); |
4081 | return node; |
4082 | } |
4083 | case Repl2I_rule: { |
4084 | Repl2INode *node = new Repl2INode(); |
4085 | node->_bottom_type = _leaf->bottom_type(); |
4086 | return node; |
4087 | } |
4088 | case Repl2I_mem_rule: { |
4089 | Repl2I_memNode *node = new Repl2I_memNode(); |
4090 | node->_bottom_type = _leaf->bottom_type(); |
4091 | return node; |
4092 | } |
4093 | case Repl2I_imm_rule: { |
4094 | Repl2I_immNode *node = new Repl2I_immNode(); |
4095 | node->_bottom_type = _leaf->bottom_type(); |
4096 | return node; |
4097 | } |
4098 | case Repl2I_zero_rule: { |
4099 | Repl2I_zeroNode *node = new Repl2I_zeroNode(); |
4100 | node->_bottom_type = _leaf->bottom_type(); |
4101 | return node; |
4102 | } |
4103 | case Repl4I_zero_rule: { |
4104 | Repl4I_zeroNode *node = new Repl4I_zeroNode(); |
4105 | node->_bottom_type = _leaf->bottom_type(); |
4106 | return node; |
4107 | } |
4108 | case Repl8I_zero_rule: { |
4109 | Repl8I_zeroNode *node = new Repl8I_zeroNode(); |
4110 | node->_bottom_type = _leaf->bottom_type(); |
4111 | return node; |
4112 | } |
4113 | case Repl2L_rule: { |
4114 | Repl2LNode *node = new Repl2LNode(); |
4115 | node->_bottom_type = _leaf->bottom_type(); |
4116 | return node; |
4117 | } |
4118 | case Repl2L_imm_rule: { |
4119 | Repl2L_immNode *node = new Repl2L_immNode(); |
4120 | node->_bottom_type = _leaf->bottom_type(); |
4121 | return node; |
4122 | } |
4123 | case Repl2L_zero_rule: { |
4124 | Repl2L_zeroNode *node = new Repl2L_zeroNode(); |
4125 | node->_bottom_type = _leaf->bottom_type(); |
4126 | return node; |
4127 | } |
4128 | case Repl4L_zero_rule: { |
4129 | Repl4L_zeroNode *node = new Repl4L_zeroNode(); |
4130 | node->_bottom_type = _leaf->bottom_type(); |
4131 | return node; |
4132 | } |
4133 | case Repl2F_rule: { |
4134 | Repl2FNode *node = new Repl2FNode(); |
4135 | node->_bottom_type = _leaf->bottom_type(); |
4136 | return node; |
4137 | } |
4138 | case Repl4F_rule: { |
4139 | Repl4FNode *node = new Repl4FNode(); |
4140 | node->_bottom_type = _leaf->bottom_type(); |
4141 | return node; |
4142 | } |
4143 | case Repl2D_rule: { |
4144 | Repl2DNode *node = new Repl2DNode(); |
4145 | node->_bottom_type = _leaf->bottom_type(); |
4146 | return node; |
4147 | } |
4148 | case Repl4B_mem_evex_rule: { |
4149 | Repl4B_mem_evexNode *node = new Repl4B_mem_evexNode(); |
4150 | node->_bottom_type = _leaf->bottom_type(); |
4151 | return node; |
4152 | } |
4153 | case Repl8B_mem_evex_rule: { |
4154 | Repl8B_mem_evexNode *node = new Repl8B_mem_evexNode(); |
4155 | node->_bottom_type = _leaf->bottom_type(); |
4156 | return node; |
4157 | } |
4158 | case Repl16B_evex_rule: { |
4159 | Repl16B_evexNode *node = new Repl16B_evexNode(); |
4160 | node->_bottom_type = _leaf->bottom_type(); |
4161 | return node; |
4162 | } |
4163 | case Repl16B_mem_evex_rule: { |
4164 | Repl16B_mem_evexNode *node = new Repl16B_mem_evexNode(); |
4165 | node->_bottom_type = _leaf->bottom_type(); |
4166 | return node; |
4167 | } |
4168 | case Repl32B_evex_rule: { |
4169 | Repl32B_evexNode *node = new Repl32B_evexNode(); |
4170 | node->_bottom_type = _leaf->bottom_type(); |
4171 | return node; |
4172 | } |
4173 | case Repl32B_mem_evex_rule: { |
4174 | Repl32B_mem_evexNode *node = new Repl32B_mem_evexNode(); |
4175 | node->_bottom_type = _leaf->bottom_type(); |
4176 | return node; |
4177 | } |
4178 | case Repl64B_evex_rule: { |
4179 | Repl64B_evexNode *node = new Repl64B_evexNode(); |
4180 | node->_bottom_type = _leaf->bottom_type(); |
4181 | return node; |
4182 | } |
4183 | case Repl64B_mem_evex_rule: { |
4184 | Repl64B_mem_evexNode *node = new Repl64B_mem_evexNode(); |
4185 | node->_bottom_type = _leaf->bottom_type(); |
4186 | return node; |
4187 | } |
4188 | case Repl16B_imm_evex_rule: { |
4189 | Repl16B_imm_evexNode *node = new Repl16B_imm_evexNode(); |
4190 | node->_bottom_type = _leaf->bottom_type(); |
4191 | return node; |
4192 | } |
4193 | case Repl32B_imm_evex_rule: { |
4194 | Repl32B_imm_evexNode *node = new Repl32B_imm_evexNode(); |
4195 | node->_bottom_type = _leaf->bottom_type(); |
4196 | return node; |
4197 | } |
4198 | case Repl64B_imm_evex_rule: { |
4199 | Repl64B_imm_evexNode *node = new Repl64B_imm_evexNode(); |
4200 | node->_bottom_type = _leaf->bottom_type(); |
4201 | return node; |
4202 | } |
4203 | case Repl64B_zero_evex_rule: { |
4204 | Repl64B_zero_evexNode *node = new Repl64B_zero_evexNode(); |
4205 | node->_bottom_type = _leaf->bottom_type(); |
4206 | return node; |
4207 | } |
4208 | case Repl4S_evex_rule: { |
4209 | Repl4S_evexNode *node = new Repl4S_evexNode(); |
4210 | node->_bottom_type = _leaf->bottom_type(); |
4211 | return node; |
4212 | } |
4213 | case Repl4S_mem_evex_rule: { |
4214 | Repl4S_mem_evexNode *node = new Repl4S_mem_evexNode(); |
4215 | node->_bottom_type = _leaf->bottom_type(); |
4216 | return node; |
4217 | } |
4218 | case Repl8S_evex_rule: { |
4219 | Repl8S_evexNode *node = new Repl8S_evexNode(); |
4220 | node->_bottom_type = _leaf->bottom_type(); |
4221 | return node; |
4222 | } |
4223 | case Repl8S_mem_evex_rule: { |
4224 | Repl8S_mem_evexNode *node = new Repl8S_mem_evexNode(); |
4225 | node->_bottom_type = _leaf->bottom_type(); |
4226 | return node; |
4227 | } |
4228 | case Repl16S_evex_rule: { |
4229 | Repl16S_evexNode *node = new Repl16S_evexNode(); |
4230 | node->_bottom_type = _leaf->bottom_type(); |
4231 | return node; |
4232 | } |
4233 | case Repl16S_mem_evex_rule: { |
4234 | Repl16S_mem_evexNode *node = new Repl16S_mem_evexNode(); |
4235 | node->_bottom_type = _leaf->bottom_type(); |
4236 | return node; |
4237 | } |
4238 | case Repl32S_evex_rule: { |
4239 | Repl32S_evexNode *node = new Repl32S_evexNode(); |
4240 | node->_bottom_type = _leaf->bottom_type(); |
4241 | return node; |
4242 | } |
4243 | case Repl32S_mem_evex_rule: { |
4244 | Repl32S_mem_evexNode *node = new Repl32S_mem_evexNode(); |
4245 | node->_bottom_type = _leaf->bottom_type(); |
4246 | return node; |
4247 | } |
4248 | case Repl8S_imm_evex_rule: { |
4249 | Repl8S_imm_evexNode *node = new Repl8S_imm_evexNode(); |
4250 | node->_bottom_type = _leaf->bottom_type(); |
4251 | return node; |
4252 | } |
4253 | case Repl16S_imm_evex_rule: { |
4254 | Repl16S_imm_evexNode *node = new Repl16S_imm_evexNode(); |
4255 | node->_bottom_type = _leaf->bottom_type(); |
4256 | return node; |
4257 | } |
4258 | case Repl32S_imm_evex_rule: { |
4259 | Repl32S_imm_evexNode *node = new Repl32S_imm_evexNode(); |
4260 | node->_bottom_type = _leaf->bottom_type(); |
4261 | return node; |
4262 | } |
4263 | case Repl32S_zero_evex_rule: { |
4264 | Repl32S_zero_evexNode *node = new Repl32S_zero_evexNode(); |
4265 | node->_bottom_type = _leaf->bottom_type(); |
4266 | return node; |
4267 | } |
4268 | case Repl4I_evex_rule: { |
4269 | Repl4I_evexNode *node = new Repl4I_evexNode(); |
4270 | node->_bottom_type = _leaf->bottom_type(); |
4271 | return node; |
4272 | } |
4273 | case Repl4I_mem_evex_rule: { |
4274 | Repl4I_mem_evexNode *node = new Repl4I_mem_evexNode(); |
4275 | node->_bottom_type = _leaf->bottom_type(); |
4276 | return node; |
4277 | } |
4278 | case Repl8I_evex_rule: { |
4279 | Repl8I_evexNode *node = new Repl8I_evexNode(); |
4280 | node->_bottom_type = _leaf->bottom_type(); |
4281 | return node; |
4282 | } |
4283 | case Repl8I_mem_evex_rule: { |
4284 | Repl8I_mem_evexNode *node = new Repl8I_mem_evexNode(); |
4285 | node->_bottom_type = _leaf->bottom_type(); |
4286 | return node; |
4287 | } |
4288 | case Repl16I_evex_rule: { |
4289 | Repl16I_evexNode *node = new Repl16I_evexNode(); |
4290 | node->_bottom_type = _leaf->bottom_type(); |
4291 | return node; |
4292 | } |
4293 | case Repl16I_mem_evex_rule: { |
4294 | Repl16I_mem_evexNode *node = new Repl16I_mem_evexNode(); |
4295 | node->_bottom_type = _leaf->bottom_type(); |
4296 | return node; |
4297 | } |
4298 | case Repl4I_imm_evex_rule: { |
4299 | Repl4I_imm_evexNode *node = new Repl4I_imm_evexNode(); |
4300 | node->_bottom_type = _leaf->bottom_type(); |
4301 | return node; |
4302 | } |
4303 | case Repl8I_imm_evex_rule: { |
4304 | Repl8I_imm_evexNode *node = new Repl8I_imm_evexNode(); |
4305 | node->_bottom_type = _leaf->bottom_type(); |
4306 | return node; |
4307 | } |
4308 | case Repl16I_imm_evex_rule: { |
4309 | Repl16I_imm_evexNode *node = new Repl16I_imm_evexNode(); |
4310 | node->_bottom_type = _leaf->bottom_type(); |
4311 | return node; |
4312 | } |
4313 | case Repl16I_zero_evex_rule: { |
4314 | Repl16I_zero_evexNode *node = new Repl16I_zero_evexNode(); |
4315 | node->_bottom_type = _leaf->bottom_type(); |
4316 | return node; |
4317 | } |
4318 | case Repl4L_evex_rule: { |
4319 | Repl4L_evexNode *node = new Repl4L_evexNode(); |
4320 | node->_bottom_type = _leaf->bottom_type(); |
4321 | return node; |
4322 | } |
4323 | case Repl8L_evex_rule: { |
4324 | Repl8L_evexNode *node = new Repl8L_evexNode(); |
4325 | node->_bottom_type = _leaf->bottom_type(); |
4326 | return node; |
4327 | } |
4328 | case Repl4L_imm_evex_rule: { |
4329 | Repl4L_imm_evexNode *node = new Repl4L_imm_evexNode(); |
4330 | node->_bottom_type = _leaf->bottom_type(); |
4331 | return node; |
4332 | } |
4333 | case Repl8L_imm_evex_rule: { |
4334 | Repl8L_imm_evexNode *node = new Repl8L_imm_evexNode(); |
4335 | node->_bottom_type = _leaf->bottom_type(); |
4336 | return node; |
4337 | } |
4338 | case Repl2L_mem_evex_rule: { |
4339 | Repl2L_mem_evexNode *node = new Repl2L_mem_evexNode(); |
4340 | node->_bottom_type = _leaf->bottom_type(); |
4341 | return node; |
4342 | } |
4343 | case Repl4L_mem_evex_rule: { |
4344 | Repl4L_mem_evexNode *node = new Repl4L_mem_evexNode(); |
4345 | node->_bottom_type = _leaf->bottom_type(); |
4346 | return node; |
4347 | } |
4348 | case Repl8L_mem_evex_rule: { |
4349 | Repl8L_mem_evexNode *node = new Repl8L_mem_evexNode(); |
4350 | node->_bottom_type = _leaf->bottom_type(); |
4351 | return node; |
4352 | } |
4353 | case Repl8L_zero_evex_rule: { |
4354 | Repl8L_zero_evexNode *node = new Repl8L_zero_evexNode(); |
4355 | node->_bottom_type = _leaf->bottom_type(); |
4356 | return node; |
4357 | } |
4358 | case Repl8F_evex_rule: { |
4359 | Repl8F_evexNode *node = new Repl8F_evexNode(); |
4360 | node->_bottom_type = _leaf->bottom_type(); |
4361 | return node; |
4362 | } |
4363 | case Repl8F_mem_evex_rule: { |
4364 | Repl8F_mem_evexNode *node = new Repl8F_mem_evexNode(); |
4365 | node->_bottom_type = _leaf->bottom_type(); |
4366 | return node; |
4367 | } |
4368 | case Repl16F_evex_rule: { |
4369 | Repl16F_evexNode *node = new Repl16F_evexNode(); |
4370 | node->_bottom_type = _leaf->bottom_type(); |
4371 | return node; |
4372 | } |
4373 | case Repl16F_mem_evex_rule: { |
4374 | Repl16F_mem_evexNode *node = new Repl16F_mem_evexNode(); |
4375 | node->_bottom_type = _leaf->bottom_type(); |
4376 | return node; |
4377 | } |
4378 | case Repl2F_zero_evex_rule: { |
4379 | Repl2F_zero_evexNode *node = new Repl2F_zero_evexNode(); |
4380 | node->_bottom_type = _leaf->bottom_type(); |
4381 | return node; |
4382 | } |
4383 | case Repl4F_zero_evex_rule: { |
4384 | Repl4F_zero_evexNode *node = new Repl4F_zero_evexNode(); |
4385 | node->_bottom_type = _leaf->bottom_type(); |
4386 | return node; |
4387 | } |
4388 | case Repl8F_zero_evex_rule: { |
4389 | Repl8F_zero_evexNode *node = new Repl8F_zero_evexNode(); |
4390 | node->_bottom_type = _leaf->bottom_type(); |
4391 | return node; |
4392 | } |
4393 | case Repl16F_zero_evex_rule: { |
4394 | Repl16F_zero_evexNode *node = new Repl16F_zero_evexNode(); |
4395 | node->_bottom_type = _leaf->bottom_type(); |
4396 | return node; |
4397 | } |
4398 | case Repl4D_evex_rule: { |
4399 | Repl4D_evexNode *node = new Repl4D_evexNode(); |
4400 | node->_bottom_type = _leaf->bottom_type(); |
4401 | return node; |
4402 | } |
4403 | case Repl4D_mem_evex_rule: { |
4404 | Repl4D_mem_evexNode *node = new Repl4D_mem_evexNode(); |
4405 | node->_bottom_type = _leaf->bottom_type(); |
4406 | return node; |
4407 | } |
4408 | case Repl8D_evex_rule: { |
4409 | Repl8D_evexNode *node = new Repl8D_evexNode(); |
4410 | node->_bottom_type = _leaf->bottom_type(); |
4411 | return node; |
4412 | } |
4413 | case Repl8D_mem_evex_rule: { |
4414 | Repl8D_mem_evexNode *node = new Repl8D_mem_evexNode(); |
4415 | node->_bottom_type = _leaf->bottom_type(); |
4416 | return node; |
4417 | } |
4418 | case Repl2D_zero_evex_rule: { |
4419 | Repl2D_zero_evexNode *node = new Repl2D_zero_evexNode(); |
4420 | node->_bottom_type = _leaf->bottom_type(); |
4421 | return node; |
4422 | } |
4423 | case Repl4D_zero_evex_rule: { |
4424 | Repl4D_zero_evexNode *node = new Repl4D_zero_evexNode(); |
4425 | node->_bottom_type = _leaf->bottom_type(); |
4426 | return node; |
4427 | } |
4428 | case Repl8D_zero_evex_rule: { |
4429 | Repl8D_zero_evexNode *node = new Repl8D_zero_evexNode(); |
4430 | node->_bottom_type = _leaf->bottom_type(); |
4431 | return node; |
4432 | } |
4433 | case rsadd2I_reduction_reg_rule: { |
4434 | rsadd2I_reduction_regNode *node = new rsadd2I_reduction_regNode(); |
4435 | node->set_opnd_array(3, MachOperGenerator(VECD)); |
4436 | node->set_opnd_array(4, MachOperGenerator(VECD)); |
4437 | node->_bottom_type = _leaf->bottom_type(); |
4438 | return node; |
4439 | } |
4440 | case rvadd2I_reduction_reg_rule: { |
4441 | rvadd2I_reduction_regNode *node = new rvadd2I_reduction_regNode(); |
4442 | node->set_opnd_array(3, MachOperGenerator(VECD)); |
4443 | node->set_opnd_array(4, MachOperGenerator(VECD)); |
4444 | node->_bottom_type = _leaf->bottom_type(); |
4445 | return node; |
4446 | } |
4447 | case rvadd2I_reduction_reg_evex_rule: { |
4448 | rvadd2I_reduction_reg_evexNode *node = new rvadd2I_reduction_reg_evexNode(); |
4449 | node->set_opnd_array(3, MachOperGenerator(VECD)); |
4450 | node->set_opnd_array(4, MachOperGenerator(VECD)); |
4451 | node->_bottom_type = _leaf->bottom_type(); |
4452 | return node; |
4453 | } |
4454 | case rsadd4I_reduction_reg_rule: { |
4455 | rsadd4I_reduction_regNode *node = new rsadd4I_reduction_regNode(); |
4456 | node->set_opnd_array(3, MachOperGenerator(VECX)); |
4457 | node->set_opnd_array(4, MachOperGenerator(VECX)); |
4458 | node->_bottom_type = _leaf->bottom_type(); |
4459 | return node; |
4460 | } |
4461 | case rvadd4I_reduction_reg_rule: { |
4462 | rvadd4I_reduction_regNode *node = new rvadd4I_reduction_regNode(); |
4463 | node->set_opnd_array(3, MachOperGenerator(VECX)); |
4464 | node->set_opnd_array(4, MachOperGenerator(VECX)); |
4465 | node->_bottom_type = _leaf->bottom_type(); |
4466 | return node; |
4467 | } |
4468 | case rvadd4I_reduction_reg_evex_rule: { |
4469 | rvadd4I_reduction_reg_evexNode *node = new rvadd4I_reduction_reg_evexNode(); |
4470 | node->set_opnd_array(3, MachOperGenerator(VECX)); |
4471 | node->set_opnd_array(4, MachOperGenerator(VECX)); |
4472 | node->_bottom_type = _leaf->bottom_type(); |
4473 | return node; |
4474 | } |
4475 | case rvadd8I_reduction_reg_rule: { |
4476 | rvadd8I_reduction_regNode *node = new rvadd8I_reduction_regNode(); |
4477 | node->set_opnd_array(3, MachOperGenerator(VECY)); |
4478 | node->set_opnd_array(4, MachOperGenerator(VECY)); |
4479 | node->_bottom_type = _leaf->bottom_type(); |
4480 | return node; |
4481 | } |
4482 | case rvadd8I_reduction_reg_evex_rule: { |
4483 | rvadd8I_reduction_reg_evexNode *node = new rvadd8I_reduction_reg_evexNode(); |
4484 | node->set_opnd_array(3, MachOperGenerator(VECY)); |
4485 | node->set_opnd_array(4, MachOperGenerator(VECY)); |
4486 | node->_bottom_type = _leaf->bottom_type(); |
4487 | return node; |
4488 | } |
4489 | case rvadd16I_reduction_reg_evex_rule: { |
4490 | rvadd16I_reduction_reg_evexNode *node = new rvadd16I_reduction_reg_evexNode(); |
4491 | node->set_opnd_array(3, MachOperGenerator(LEGVECZ)); |
4492 | node->set_opnd_array(4, MachOperGenerator(LEGVECZ)); |
4493 | node->set_opnd_array(5, MachOperGenerator(LEGVECZ)); |
4494 | node->_bottom_type = _leaf->bottom_type(); |
4495 | return node; |
4496 | } |
4497 | case rvadd2L_reduction_reg_rule: { |
4498 | rvadd2L_reduction_regNode *node = new rvadd2L_reduction_regNode(); |
4499 | node->set_opnd_array(3, MachOperGenerator(VECX)); |
4500 | node->set_opnd_array(4, MachOperGenerator(VECX)); |
4501 | node->_bottom_type = _leaf->bottom_type(); |
4502 | return node; |
4503 | } |
4504 | case rvadd4L_reduction_reg_rule: { |
4505 | rvadd4L_reduction_regNode *node = new rvadd4L_reduction_regNode(); |
4506 | node->set_opnd_array(3, MachOperGenerator(VECY)); |
4507 | node->set_opnd_array(4, MachOperGenerator(VECY)); |
4508 | node->_bottom_type = _leaf->bottom_type(); |
4509 | return node; |
4510 | } |
4511 | case rvadd8L_reduction_reg_rule: { |
4512 | rvadd8L_reduction_regNode *node = new rvadd8L_reduction_regNode(); |
4513 | node->set_opnd_array(3, MachOperGenerator(LEGVECZ)); |
4514 | node->set_opnd_array(4, MachOperGenerator(LEGVECZ)); |
4515 | node->_bottom_type = _leaf->bottom_type(); |
4516 | return node; |
4517 | } |
4518 | case rsadd2F_reduction_reg_rule: { |
4519 | rsadd2F_reduction_regNode *node = new rsadd2F_reduction_regNode(); |
4520 | node->set_opnd_array(3, MachOperGenerator(REGF)); |
4521 | node->set_opnd_array(4, MachOperGenerator(VECD)); |
4522 | node->_bottom_type = _leaf->bottom_type(); |
4523 | return node; |
4524 | } |
4525 | case rvadd2F_reduction_reg_rule: { |
4526 | rvadd2F_reduction_regNode *node = new rvadd2F_reduction_regNode(); |
4527 | node->set_opnd_array(3, MachOperGenerator(REGF)); |
4528 | node->set_opnd_array(4, MachOperGenerator(VECD)); |
4529 | node->_bottom_type = _leaf->bottom_type(); |
4530 | return node; |
4531 | } |
4532 | case rsadd4F_reduction_reg_rule: { |
4533 | rsadd4F_reduction_regNode *node = new rsadd4F_reduction_regNode(); |
4534 | node->set_opnd_array(3, MachOperGenerator(REGF)); |
4535 | node->set_opnd_array(4, MachOperGenerator(VECX)); |
4536 | node->_bottom_type = _leaf->bottom_type(); |
4537 | return node; |
4538 | } |
4539 | case rvadd4F_reduction_reg_rule: { |
4540 | rvadd4F_reduction_regNode *node = new rvadd4F_reduction_regNode(); |
4541 | node->set_opnd_array(3, MachOperGenerator(REGF)); |
4542 | node->set_opnd_array(4, MachOperGenerator(VECX)); |
4543 | node->_bottom_type = _leaf->bottom_type(); |
4544 | return node; |
4545 | } |
4546 | case radd8F_reduction_reg_rule: { |
4547 | radd8F_reduction_regNode *node = new radd8F_reduction_regNode(); |
4548 | node->set_opnd_array(3, MachOperGenerator(REGF)); |
4549 | node->set_opnd_array(4, MachOperGenerator(VECY)); |
4550 | node->set_opnd_array(5, MachOperGenerator(VECY)); |
4551 | node->_bottom_type = _leaf->bottom_type(); |
4552 | return node; |
4553 | } |
4554 | case radd16F_reduction_reg_rule: { |
4555 | radd16F_reduction_regNode *node = new radd16F_reduction_regNode(); |
4556 | node->set_opnd_array(3, MachOperGenerator(REGF)); |
4557 | node->set_opnd_array(4, MachOperGenerator(LEGVECZ)); |
4558 | node->set_opnd_array(5, MachOperGenerator(LEGVECZ)); |
4559 | node->_bottom_type = _leaf->bottom_type(); |
4560 | return node; |
4561 | } |
4562 | case rsadd2D_reduction_reg_rule: { |
4563 | rsadd2D_reduction_regNode *node = new rsadd2D_reduction_regNode(); |
4564 | node->set_opnd_array(3, MachOperGenerator(REGD)); |
4565 | node->set_opnd_array(4, MachOperGenerator(VECX)); |
4566 | node->_bottom_type = _leaf->bottom_type(); |
4567 | return node; |
4568 | } |
4569 | case rvadd2D_reduction_reg_rule: { |
4570 | rvadd2D_reduction_regNode *node = new rvadd2D_reduction_regNode(); |
4571 | node->set_opnd_array(3, MachOperGenerator(REGD)); |
4572 | node->set_opnd_array(4, MachOperGenerator(VECX)); |
4573 | node->_bottom_type = _leaf->bottom_type(); |
4574 | return node; |
4575 | } |
4576 | case rvadd4D_reduction_reg_rule: { |
4577 | rvadd4D_reduction_regNode *node = new rvadd4D_reduction_regNode(); |
4578 | node->set_opnd_array(3, MachOperGenerator(REGD)); |
4579 | node->set_opnd_array(4, MachOperGenerator(VECX)); |
4580 | node->set_opnd_array(5, MachOperGenerator(VECX)); |
4581 | node->_bottom_type = _leaf->bottom_type(); |
4582 | return node; |
4583 | } |
4584 | case rvadd8D_reduction_reg_rule: { |
4585 | rvadd8D_reduction_regNode *node = new rvadd8D_reduction_regNode(); |
4586 | node->set_opnd_array(3, MachOperGenerator(REGD)); |
4587 | node->set_opnd_array(4, MachOperGenerator(LEGVECZ)); |
4588 | node->set_opnd_array(5, MachOperGenerator(LEGVECZ)); |
4589 | node->_bottom_type = _leaf->bottom_type(); |
4590 | return node; |
4591 | } |
4592 | case rsmul2I_reduction_reg_rule: { |
4593 | rsmul2I_reduction_regNode *node = new rsmul2I_reduction_regNode(); |
4594 | node->set_opnd_array(3, MachOperGenerator(VECD)); |
4595 | node->set_opnd_array(4, MachOperGenerator(VECD)); |
4596 | node->_bottom_type = _leaf->bottom_type(); |
4597 | return node; |
4598 | } |
4599 | case rvmul2I_reduction_reg_rule: { |
4600 | rvmul2I_reduction_regNode *node = new rvmul2I_reduction_regNode(); |
4601 | node->set_opnd_array(3, MachOperGenerator(VECD)); |
4602 | node->set_opnd_array(4, MachOperGenerator(VECD)); |
4603 | node->_bottom_type = _leaf->bottom_type(); |
4604 | return node; |
4605 | } |
4606 | case rsmul4I_reduction_reg_rule: { |
4607 | rsmul4I_reduction_regNode *node = new rsmul4I_reduction_regNode(); |
4608 | node->set_opnd_array(3, MachOperGenerator(VECX)); |
4609 | node->set_opnd_array(4, MachOperGenerator(VECX)); |
4610 | node->_bottom_type = _leaf->bottom_type(); |
4611 | return node; |
4612 | } |
4613 | case rvmul4I_reduction_reg_rule: { |
4614 | rvmul4I_reduction_regNode *node = new rvmul4I_reduction_regNode(); |
4615 | node->set_opnd_array(3, MachOperGenerator(VECX)); |
4616 | node->set_opnd_array(4, MachOperGenerator(VECX)); |
4617 | node->_bottom_type = _leaf->bottom_type(); |
4618 | return node; |
4619 | } |
4620 | case rvmul8I_reduction_reg_rule: { |
4621 | rvmul8I_reduction_regNode *node = new rvmul8I_reduction_regNode(); |
4622 | node->set_opnd_array(3, MachOperGenerator(VECY)); |
4623 | node->set_opnd_array(4, MachOperGenerator(VECY)); |
4624 | node->_bottom_type = _leaf->bottom_type(); |
4625 | return node; |
4626 | } |
4627 | case rvmul16I_reduction_reg_rule: { |
4628 | rvmul16I_reduction_regNode *node = new rvmul16I_reduction_regNode(); |
4629 | node->set_opnd_array(3, MachOperGenerator(LEGVECZ)); |
4630 | node->set_opnd_array(4, MachOperGenerator(LEGVECZ)); |
4631 | node->set_opnd_array(5, MachOperGenerator(LEGVECZ)); |
4632 | node->_bottom_type = _leaf->bottom_type(); |
4633 | return node; |
4634 | } |
4635 | case rvmul2L_reduction_reg_rule: { |
4636 | rvmul2L_reduction_regNode *node = new rvmul2L_reduction_regNode(); |
4637 | node->set_opnd_array(3, MachOperGenerator(VECX)); |
4638 | node->set_opnd_array(4, MachOperGenerator(VECX)); |
4639 | node->_bottom_type = _leaf->bottom_type(); |
4640 | return node; |
4641 | } |
4642 | case rvmul4L_reduction_reg_rule: { |
4643 | rvmul4L_reduction_regNode *node = new rvmul4L_reduction_regNode(); |
4644 | node->set_opnd_array(3, MachOperGenerator(VECY)); |
4645 | node->set_opnd_array(4, MachOperGenerator(VECY)); |
4646 | node->_bottom_type = _leaf->bottom_type(); |
4647 | return node; |
4648 | } |
4649 | case rvmul8L_reduction_reg_rule: { |
4650 | rvmul8L_reduction_regNode *node = new rvmul8L_reduction_regNode(); |
4651 | node->set_opnd_array(3, MachOperGenerator(LEGVECZ)); |
4652 | node->set_opnd_array(4, MachOperGenerator(LEGVECZ)); |
4653 | node->_bottom_type = _leaf->bottom_type(); |
4654 | return node; |
4655 | } |
4656 | case rsmul2F_reduction_rule: { |
4657 | rsmul2F_reductionNode *node = new rsmul2F_reductionNode(); |
4658 | node->set_opnd_array(3, MachOperGenerator(REGF)); |
4659 | node->set_opnd_array(4, MachOperGenerator(VECD)); |
4660 | node->_bottom_type = _leaf->bottom_type(); |
4661 | return node; |
4662 | } |
4663 | case rvmul2F_reduction_reg_rule: { |
4664 | rvmul2F_reduction_regNode *node = new rvmul2F_reduction_regNode(); |
4665 | node->set_opnd_array(3, MachOperGenerator(REGF)); |
4666 | node->set_opnd_array(4, MachOperGenerator(VECD)); |
4667 | node->_bottom_type = _leaf->bottom_type(); |
4668 | return node; |
4669 | } |
4670 | case rsmul4F_reduction_reg_rule: { |
4671 | rsmul4F_reduction_regNode *node = new rsmul4F_reduction_regNode(); |
4672 | node->set_opnd_array(3, MachOperGenerator(REGF)); |
4673 | node->set_opnd_array(4, MachOperGenerator(VECX)); |
4674 | node->_bottom_type = _leaf->bottom_type(); |
4675 | return node; |
4676 | } |
4677 | case rvmul4F_reduction_reg_rule: { |
4678 | rvmul4F_reduction_regNode *node = new rvmul4F_reduction_regNode(); |
4679 | node->set_opnd_array(3, MachOperGenerator(REGF)); |
4680 | node->set_opnd_array(4, MachOperGenerator(VECX)); |
4681 | node->_bottom_type = _leaf->bottom_type(); |
4682 | return node; |
4683 | } |
4684 | case rvmul8F_reduction_reg_rule: { |
4685 | rvmul8F_reduction_regNode *node = new rvmul8F_reduction_regNode(); |
4686 | node->set_opnd_array(3, MachOperGenerator(REGF)); |
4687 | node->set_opnd_array(4, MachOperGenerator(VECY)); |
4688 | node->set_opnd_array(5, MachOperGenerator(VECY)); |
4689 | node->_bottom_type = _leaf->bottom_type(); |
4690 | return node; |
4691 | } |
4692 | case rvmul16F_reduction_reg_rule: { |
4693 | rvmul16F_reduction_regNode *node = new rvmul16F_reduction_regNode(); |
4694 | node->set_opnd_array(3, MachOperGenerator(REGF)); |
4695 | node->set_opnd_array(4, MachOperGenerator(LEGVECZ)); |
4696 | node->set_opnd_array(5, MachOperGenerator(LEGVECZ)); |
4697 | node->_bottom_type = _leaf->bottom_type(); |
4698 | return node; |
4699 | } |
4700 | case rsmul2D_reduction_reg_rule: { |
4701 | rsmul2D_reduction_regNode *node = new rsmul2D_reduction_regNode(); |
4702 | node->set_opnd_array(3, MachOperGenerator(REGD)); |
4703 | node->set_opnd_array(4, MachOperGenerator(VECX)); |
4704 | node->_bottom_type = _leaf->bottom_type(); |
4705 | return node; |
4706 | } |
4707 | case rvmul2D_reduction_reg_rule: { |
4708 | rvmul2D_reduction_regNode *node = new rvmul2D_reduction_regNode(); |
4709 | node->set_opnd_array(3, MachOperGenerator(REGD)); |
4710 | node->set_opnd_array(4, MachOperGenerator(VECX)); |
4711 | node->_bottom_type = _leaf->bottom_type(); |
4712 | return node; |
4713 | } |
4714 | case rvmul4D_reduction_reg_rule: { |
4715 | rvmul4D_reduction_regNode *node = new rvmul4D_reduction_regNode(); |
4716 | node->set_opnd_array(3, MachOperGenerator(REGD)); |
4717 | node->set_opnd_array(4, MachOperGenerator(VECY)); |
4718 | node->set_opnd_array(5, MachOperGenerator(VECY)); |
4719 | node->_bottom_type = _leaf->bottom_type(); |
4720 | return node; |
4721 | } |
4722 | case rvmul8D_reduction_reg_rule: { |
4723 | rvmul8D_reduction_regNode *node = new rvmul8D_reduction_regNode(); |
4724 | node->set_opnd_array(3, MachOperGenerator(REGD)); |
4725 | node->set_opnd_array(4, MachOperGenerator(LEGVECZ)); |
4726 | node->set_opnd_array(5, MachOperGenerator(LEGVECZ)); |
4727 | node->_bottom_type = _leaf->bottom_type(); |
4728 | return node; |
4729 | } |
4730 | case vadd4B_rule: { |
4731 | vadd4BNode *node = new vadd4BNode(); |
4732 | node->_bottom_type = _leaf->bottom_type(); |
4733 | return node; |
4734 | } |
4735 | case vadd4B_reg_rule: { |
4736 | vadd4B_regNode *node = new vadd4B_regNode(); |
4737 | node->_bottom_type = _leaf->bottom_type(); |
4738 | return node; |
4739 | } |
4740 | case vadd4B_mem_rule: { |
4741 | vadd4B_memNode *node = new vadd4B_memNode(); |
4742 | node->_bottom_type = _leaf->bottom_type(); |
4743 | return node; |
4744 | } |
4745 | case vadd4B_mem_0_rule: { |
4746 | vadd4B_mem_0Node *node = new vadd4B_mem_0Node(); |
4747 | node->_bottom_type = _leaf->bottom_type(); |
4748 | return node; |
4749 | } |
4750 | case vadd8B_rule: { |
4751 | vadd8BNode *node = new vadd8BNode(); |
4752 | node->_bottom_type = _leaf->bottom_type(); |
4753 | return node; |
4754 | } |
4755 | case vadd8B_reg_rule: { |
4756 | vadd8B_regNode *node = new vadd8B_regNode(); |
4757 | node->_bottom_type = _leaf->bottom_type(); |
4758 | return node; |
4759 | } |
4760 | case vadd8B_mem_rule: { |
4761 | vadd8B_memNode *node = new vadd8B_memNode(); |
4762 | node->_bottom_type = _leaf->bottom_type(); |
4763 | return node; |
4764 | } |
4765 | case vadd8B_mem_0_rule: { |
4766 | vadd8B_mem_0Node *node = new vadd8B_mem_0Node(); |
4767 | node->_bottom_type = _leaf->bottom_type(); |
4768 | return node; |
4769 | } |
4770 | case vadd16B_rule: { |
4771 | vadd16BNode *node = new vadd16BNode(); |
4772 | node->_bottom_type = _leaf->bottom_type(); |
4773 | return node; |
4774 | } |
4775 | case vadd16B_reg_rule: { |
4776 | vadd16B_regNode *node = new vadd16B_regNode(); |
4777 | node->_bottom_type = _leaf->bottom_type(); |
4778 | return node; |
4779 | } |
4780 | case vadd16B_mem_rule: { |
4781 | vadd16B_memNode *node = new vadd16B_memNode(); |
4782 | node->_bottom_type = _leaf->bottom_type(); |
4783 | return node; |
4784 | } |
4785 | case vadd16B_mem_0_rule: { |
4786 | vadd16B_mem_0Node *node = new vadd16B_mem_0Node(); |
4787 | node->_bottom_type = _leaf->bottom_type(); |
4788 | return node; |
4789 | } |
4790 | case vadd32B_reg_rule: { |
4791 | vadd32B_regNode *node = new vadd32B_regNode(); |
4792 | node->_bottom_type = _leaf->bottom_type(); |
4793 | return node; |
4794 | } |
4795 | case vadd32B_mem_rule: { |
4796 | vadd32B_memNode *node = new vadd32B_memNode(); |
4797 | node->_bottom_type = _leaf->bottom_type(); |
4798 | return node; |
4799 | } |
4800 | case vadd32B_mem_0_rule: { |
4801 | vadd32B_mem_0Node *node = new vadd32B_mem_0Node(); |
4802 | node->_bottom_type = _leaf->bottom_type(); |
4803 | return node; |
4804 | } |
4805 | case vadd64B_reg_rule: { |
4806 | vadd64B_regNode *node = new vadd64B_regNode(); |
4807 | node->_bottom_type = _leaf->bottom_type(); |
4808 | return node; |
4809 | } |
4810 | case vadd64B_mem_rule: { |
4811 | vadd64B_memNode *node = new vadd64B_memNode(); |
4812 | node->_bottom_type = _leaf->bottom_type(); |
4813 | return node; |
4814 | } |
4815 | case vadd64B_mem_0_rule: { |
4816 | vadd64B_mem_0Node *node = new vadd64B_mem_0Node(); |
4817 | node->_bottom_type = _leaf->bottom_type(); |
4818 | return node; |
4819 | } |
4820 | case vadd2S_rule: { |
4821 | vadd2SNode *node = new vadd2SNode(); |
4822 | node->_bottom_type = _leaf->bottom_type(); |
4823 | return node; |
4824 | } |
4825 | case vadd2S_reg_rule: { |
4826 | vadd2S_regNode *node = new vadd2S_regNode(); |
4827 | node->_bottom_type = _leaf->bottom_type(); |
4828 | return node; |
4829 | } |
4830 | case vadd2S_mem_rule: { |
4831 | vadd2S_memNode *node = new vadd2S_memNode(); |
4832 | node->_bottom_type = _leaf->bottom_type(); |
4833 | return node; |
4834 | } |
4835 | case vadd2S_mem_0_rule: { |
4836 | vadd2S_mem_0Node *node = new vadd2S_mem_0Node(); |
4837 | node->_bottom_type = _leaf->bottom_type(); |
4838 | return node; |
4839 | } |
4840 | case vadd4S_rule: { |
4841 | vadd4SNode *node = new vadd4SNode(); |
4842 | node->_bottom_type = _leaf->bottom_type(); |
4843 | return node; |
4844 | } |
4845 | case vadd4S_reg_rule: { |
4846 | vadd4S_regNode *node = new vadd4S_regNode(); |
4847 | node->_bottom_type = _leaf->bottom_type(); |
4848 | return node; |
4849 | } |
4850 | case vadd4S_mem_rule: { |
4851 | vadd4S_memNode *node = new vadd4S_memNode(); |
4852 | node->_bottom_type = _leaf->bottom_type(); |
4853 | return node; |
4854 | } |
4855 | case vadd4S_mem_0_rule: { |
4856 | vadd4S_mem_0Node *node = new vadd4S_mem_0Node(); |
4857 | node->_bottom_type = _leaf->bottom_type(); |
4858 | return node; |
4859 | } |
4860 | case vadd8S_rule: { |
4861 | vadd8SNode *node = new vadd8SNode(); |
4862 | node->_bottom_type = _leaf->bottom_type(); |
4863 | return node; |
4864 | } |
4865 | case vadd8S_reg_rule: { |
4866 | vadd8S_regNode *node = new vadd8S_regNode(); |
4867 | node->_bottom_type = _leaf->bottom_type(); |
4868 | return node; |
4869 | } |
4870 | case vadd8S_mem_rule: { |
4871 | vadd8S_memNode *node = new vadd8S_memNode(); |
4872 | node->_bottom_type = _leaf->bottom_type(); |
4873 | return node; |
4874 | } |
4875 | case vadd8S_mem_0_rule: { |
4876 | vadd8S_mem_0Node *node = new vadd8S_mem_0Node(); |
4877 | node->_bottom_type = _leaf->bottom_type(); |
4878 | return node; |
4879 | } |
4880 | case vadd16S_reg_rule: { |
4881 | vadd16S_regNode *node = new vadd16S_regNode(); |
4882 | node->_bottom_type = _leaf->bottom_type(); |
4883 | return node; |
4884 | } |
4885 | case vadd16S_mem_rule: { |
4886 | vadd16S_memNode *node = new vadd16S_memNode(); |
4887 | node->_bottom_type = _leaf->bottom_type(); |
4888 | return node; |
4889 | } |
4890 | case vadd16S_mem_0_rule: { |
4891 | vadd16S_mem_0Node *node = new vadd16S_mem_0Node(); |
4892 | node->_bottom_type = _leaf->bottom_type(); |
4893 | return node; |
4894 | } |
4895 | case vadd32S_reg_rule: { |
4896 | vadd32S_regNode *node = new vadd32S_regNode(); |
4897 | node->_bottom_type = _leaf->bottom_type(); |
4898 | return node; |
4899 | } |
4900 | case vadd32S_mem_rule: { |
4901 | vadd32S_memNode *node = new vadd32S_memNode(); |
4902 | node->_bottom_type = _leaf->bottom_type(); |
4903 | return node; |
4904 | } |
4905 | case vadd32S_mem_0_rule: { |
4906 | vadd32S_mem_0Node *node = new vadd32S_mem_0Node(); |
4907 | node->_bottom_type = _leaf->bottom_type(); |
4908 | return node; |
4909 | } |
4910 | case vadd2I_rule: { |
4911 | vadd2INode *node = new vadd2INode(); |
4912 | node->_bottom_type = _leaf->bottom_type(); |
4913 | return node; |
4914 | } |
4915 | case vadd2I_reg_rule: { |
4916 | vadd2I_regNode *node = new vadd2I_regNode(); |
4917 | node->_bottom_type = _leaf->bottom_type(); |
4918 | return node; |
4919 | } |
4920 | case vadd2I_mem_rule: { |
4921 | vadd2I_memNode *node = new vadd2I_memNode(); |
4922 | node->_bottom_type = _leaf->bottom_type(); |
4923 | return node; |
4924 | } |
4925 | case vadd2I_mem_0_rule: { |
4926 | vadd2I_mem_0Node *node = new vadd2I_mem_0Node(); |
4927 | node->_bottom_type = _leaf->bottom_type(); |
4928 | return node; |
4929 | } |
4930 | case vadd4I_rule: { |
4931 | vadd4INode *node = new vadd4INode(); |
4932 | node->_bottom_type = _leaf->bottom_type(); |
4933 | return node; |
4934 | } |
4935 | case vadd4I_reg_rule: { |
4936 | vadd4I_regNode *node = new vadd4I_regNode(); |
4937 | node->_bottom_type = _leaf->bottom_type(); |
4938 | return node; |
4939 | } |
4940 | case vadd4I_mem_rule: { |
4941 | vadd4I_memNode *node = new vadd4I_memNode(); |
4942 | node->_bottom_type = _leaf->bottom_type(); |
4943 | return node; |
4944 | } |
4945 | case vadd4I_mem_0_rule: { |
4946 | vadd4I_mem_0Node *node = new vadd4I_mem_0Node(); |
4947 | node->_bottom_type = _leaf->bottom_type(); |
4948 | return node; |
4949 | } |
4950 | case vadd8I_reg_rule: { |
4951 | vadd8I_regNode *node = new vadd8I_regNode(); |
4952 | node->_bottom_type = _leaf->bottom_type(); |
4953 | return node; |
4954 | } |
4955 | case vadd8I_mem_rule: { |
4956 | vadd8I_memNode *node = new vadd8I_memNode(); |
4957 | node->_bottom_type = _leaf->bottom_type(); |
4958 | return node; |
4959 | } |
4960 | case vadd8I_mem_0_rule: { |
4961 | vadd8I_mem_0Node *node = new vadd8I_mem_0Node(); |
4962 | node->_bottom_type = _leaf->bottom_type(); |
4963 | return node; |
4964 | } |
4965 | case vadd16I_reg_rule: { |
4966 | vadd16I_regNode *node = new vadd16I_regNode(); |
4967 | node->_bottom_type = _leaf->bottom_type(); |
4968 | return node; |
4969 | } |
4970 | case vadd16I_mem_rule: { |
4971 | vadd16I_memNode *node = new vadd16I_memNode(); |
4972 | node->_bottom_type = _leaf->bottom_type(); |
4973 | return node; |
4974 | } |
4975 | case vadd16I_mem_0_rule: { |
4976 | vadd16I_mem_0Node *node = new vadd16I_mem_0Node(); |
4977 | node->_bottom_type = _leaf->bottom_type(); |
4978 | return node; |
4979 | } |
4980 | case vadd2L_rule: { |
4981 | vadd2LNode *node = new vadd2LNode(); |
4982 | node->_bottom_type = _leaf->bottom_type(); |
4983 | return node; |
4984 | } |
4985 | case vadd2L_reg_rule: { |
4986 | vadd2L_regNode *node = new vadd2L_regNode(); |
4987 | node->_bottom_type = _leaf->bottom_type(); |
4988 | return node; |
4989 | } |
4990 | case vadd2L_mem_rule: { |
4991 | vadd2L_memNode *node = new vadd2L_memNode(); |
4992 | node->_bottom_type = _leaf->bottom_type(); |
4993 | return node; |
4994 | } |
4995 | case vadd2L_mem_0_rule: { |
4996 | vadd2L_mem_0Node *node = new vadd2L_mem_0Node(); |
4997 | node->_bottom_type = _leaf->bottom_type(); |
4998 | return node; |
4999 | } |
5000 | case vadd4L_reg_rule: { |
5001 | vadd4L_regNode *node = new vadd4L_regNode(); |
5002 | node->_bottom_type = _leaf->bottom_type(); |
5003 | return node; |
5004 | } |
5005 | case vadd4L_mem_rule: { |
5006 | vadd4L_memNode *node = new vadd4L_memNode(); |
5007 | node->_bottom_type = _leaf->bottom_type(); |
5008 | return node; |
5009 | } |
5010 | case vadd4L_mem_0_rule: { |
5011 | vadd4L_mem_0Node *node = new vadd4L_mem_0Node(); |
5012 | node->_bottom_type = _leaf->bottom_type(); |
5013 | return node; |
5014 | } |
5015 | case vadd8L_reg_rule: { |
5016 | vadd8L_regNode *node = new vadd8L_regNode(); |
5017 | node->_bottom_type = _leaf->bottom_type(); |
5018 | return node; |
5019 | } |
5020 | case vadd8L_mem_rule: { |
5021 | vadd8L_memNode *node = new vadd8L_memNode(); |
5022 | node->_bottom_type = _leaf->bottom_type(); |
5023 | return node; |
5024 | } |
5025 | case vadd8L_mem_0_rule: { |
5026 | vadd8L_mem_0Node *node = new vadd8L_mem_0Node(); |
5027 | node->_bottom_type = _leaf->bottom_type(); |
5028 | return node; |
5029 | } |
5030 | case vadd2F_rule: { |
5031 | vadd2FNode *node = new vadd2FNode(); |
5032 | node->_bottom_type = _leaf->bottom_type(); |
5033 | return node; |
5034 | } |
5035 | case vadd2F_reg_rule: { |
5036 | vadd2F_regNode *node = new vadd2F_regNode(); |
5037 | node->_bottom_type = _leaf->bottom_type(); |
5038 | return node; |
5039 | } |
5040 | case vadd2F_mem_rule: { |
5041 | vadd2F_memNode *node = new vadd2F_memNode(); |
5042 | node->_bottom_type = _leaf->bottom_type(); |
5043 | return node; |
5044 | } |
5045 | case vadd2F_mem_0_rule: { |
5046 | vadd2F_mem_0Node *node = new vadd2F_mem_0Node(); |
5047 | node->_bottom_type = _leaf->bottom_type(); |
5048 | return node; |
5049 | } |
5050 | case vadd4F_rule: { |
5051 | vadd4FNode *node = new vadd4FNode(); |
5052 | node->_bottom_type = _leaf->bottom_type(); |
5053 | return node; |
5054 | } |
5055 | case vadd4F_reg_rule: { |
5056 | vadd4F_regNode *node = new vadd4F_regNode(); |
5057 | node->_bottom_type = _leaf->bottom_type(); |
5058 | return node; |
5059 | } |
5060 | case vadd4F_mem_rule: { |
5061 | vadd4F_memNode *node = new vadd4F_memNode(); |
5062 | node->_bottom_type = _leaf->bottom_type(); |
5063 | return node; |
5064 | } |
5065 | case vadd4F_mem_0_rule: { |
5066 | vadd4F_mem_0Node *node = new vadd4F_mem_0Node(); |
5067 | node->_bottom_type = _leaf->bottom_type(); |
5068 | return node; |
5069 | } |
5070 | case vadd8F_reg_rule: { |
5071 | vadd8F_regNode *node = new vadd8F_regNode(); |
5072 | node->_bottom_type = _leaf->bottom_type(); |
5073 | return node; |
5074 | } |
5075 | case vadd8F_mem_rule: { |
5076 | vadd8F_memNode *node = new vadd8F_memNode(); |
5077 | node->_bottom_type = _leaf->bottom_type(); |
5078 | return node; |
5079 | } |
5080 | case vadd8F_mem_0_rule: { |
5081 | vadd8F_mem_0Node *node = new vadd8F_mem_0Node(); |
5082 | node->_bottom_type = _leaf->bottom_type(); |
5083 | return node; |
5084 | } |
5085 | case vadd16F_reg_rule: { |
5086 | vadd16F_regNode *node = new vadd16F_regNode(); |
5087 | node->_bottom_type = _leaf->bottom_type(); |
5088 | return node; |
5089 | } |
5090 | case vadd16F_mem_rule: { |
5091 | vadd16F_memNode *node = new vadd16F_memNode(); |
5092 | node->_bottom_type = _leaf->bottom_type(); |
5093 | return node; |
5094 | } |
5095 | case vadd16F_mem_0_rule: { |
5096 | vadd16F_mem_0Node *node = new vadd16F_mem_0Node(); |
5097 | node->_bottom_type = _leaf->bottom_type(); |
5098 | return node; |
5099 | } |
5100 | case vadd2D_rule: { |
5101 | vadd2DNode *node = new vadd2DNode(); |
5102 | node->_bottom_type = _leaf->bottom_type(); |
5103 | return node; |
5104 | } |
5105 | case vadd2D_reg_rule: { |
5106 | vadd2D_regNode *node = new vadd2D_regNode(); |
5107 | node->_bottom_type = _leaf->bottom_type(); |
5108 | return node; |
5109 | } |
5110 | case vadd2D_mem_rule: { |
5111 | vadd2D_memNode *node = new vadd2D_memNode(); |
5112 | node->_bottom_type = _leaf->bottom_type(); |
5113 | return node; |
5114 | } |
5115 | case vadd2D_mem_0_rule: { |
5116 | vadd2D_mem_0Node *node = new vadd2D_mem_0Node(); |
5117 | node->_bottom_type = _leaf->bottom_type(); |
5118 | return node; |
5119 | } |
5120 | case vadd4D_reg_rule: { |
5121 | vadd4D_regNode *node = new vadd4D_regNode(); |
5122 | node->_bottom_type = _leaf->bottom_type(); |
5123 | return node; |
5124 | } |
5125 | case vadd4D_mem_rule: { |
5126 | vadd4D_memNode *node = new vadd4D_memNode(); |
5127 | node->_bottom_type = _leaf->bottom_type(); |
5128 | return node; |
5129 | } |
5130 | case vadd4D_mem_0_rule: { |
5131 | vadd4D_mem_0Node *node = new vadd4D_mem_0Node(); |
5132 | node->_bottom_type = _leaf->bottom_type(); |
5133 | return node; |
5134 | } |
5135 | case vadd8D_reg_rule: { |
5136 | vadd8D_regNode *node = new vadd8D_regNode(); |
5137 | node->_bottom_type = _leaf->bottom_type(); |
5138 | return node; |
5139 | } |
5140 | case vadd8D_mem_rule: { |
5141 | vadd8D_memNode *node = new vadd8D_memNode(); |
5142 | node->_bottom_type = _leaf->bottom_type(); |
5143 | return node; |
5144 | } |
5145 | case vadd8D_mem_0_rule: { |
5146 | vadd8D_mem_0Node *node = new vadd8D_mem_0Node(); |
5147 | node->_bottom_type = _leaf->bottom_type(); |
5148 | return node; |
5149 | } |
5150 | case vsub4B_rule: { |
5151 | vsub4BNode *node = new vsub4BNode(); |
5152 | node->_bottom_type = _leaf->bottom_type(); |
5153 | return node; |
5154 | } |
5155 | case vsub4B_reg_rule: { |
5156 | vsub4B_regNode *node = new vsub4B_regNode(); |
5157 | node->_bottom_type = _leaf->bottom_type(); |
5158 | return node; |
5159 | } |
5160 | case vsub4B_mem_rule: { |
5161 | vsub4B_memNode *node = new vsub4B_memNode(); |
5162 | node->_bottom_type = _leaf->bottom_type(); |
5163 | return node; |
5164 | } |
5165 | case vsub8B_rule: { |
5166 | vsub8BNode *node = new vsub8BNode(); |
5167 | node->_bottom_type = _leaf->bottom_type(); |
5168 | return node; |
5169 | } |
5170 | case vsub8B_reg_rule: { |
5171 | vsub8B_regNode *node = new vsub8B_regNode(); |
5172 | node->_bottom_type = _leaf->bottom_type(); |
5173 | return node; |
5174 | } |
5175 | case vsub8B_mem_rule: { |
5176 | vsub8B_memNode *node = new vsub8B_memNode(); |
5177 | node->_bottom_type = _leaf->bottom_type(); |
5178 | return node; |
5179 | } |
5180 | case vsub16B_rule: { |
5181 | vsub16BNode *node = new vsub16BNode(); |
5182 | node->_bottom_type = _leaf->bottom_type(); |
5183 | return node; |
5184 | } |
5185 | case vsub16B_reg_rule: { |
5186 | vsub16B_regNode *node = new vsub16B_regNode(); |
5187 | node->_bottom_type = _leaf->bottom_type(); |
5188 | return node; |
5189 | } |
5190 | case vsub16B_mem_rule: { |
5191 | vsub16B_memNode *node = new vsub16B_memNode(); |
5192 | node->_bottom_type = _leaf->bottom_type(); |
5193 | return node; |
5194 | } |
5195 | case vsub32B_reg_rule: { |
5196 | vsub32B_regNode *node = new vsub32B_regNode(); |
5197 | node->_bottom_type = _leaf->bottom_type(); |
5198 | return node; |
5199 | } |
5200 | case vsub32B_mem_rule: { |
5201 | vsub32B_memNode *node = new vsub32B_memNode(); |
5202 | node->_bottom_type = _leaf->bottom_type(); |
5203 | return node; |
5204 | } |
5205 | case vsub64B_reg_rule: { |
5206 | vsub64B_regNode *node = new vsub64B_regNode(); |
5207 | node->_bottom_type = _leaf->bottom_type(); |
5208 | return node; |
5209 | } |
5210 | case vsub64B_mem_rule: { |
5211 | vsub64B_memNode *node = new vsub64B_memNode(); |
5212 | node->_bottom_type = _leaf->bottom_type(); |
5213 | return node; |
5214 | } |
5215 | case vsub2S_rule: { |
5216 | vsub2SNode *node = new vsub2SNode(); |
5217 | node->_bottom_type = _leaf->bottom_type(); |
5218 | return node; |
5219 | } |
5220 | case vsub2S_reg_rule: { |
5221 | vsub2S_regNode *node = new vsub2S_regNode(); |
5222 | node->_bottom_type = _leaf->bottom_type(); |
5223 | return node; |
5224 | } |
5225 | case vsub2S_mem_rule: { |
5226 | vsub2S_memNode *node = new vsub2S_memNode(); |
5227 | node->_bottom_type = _leaf->bottom_type(); |
5228 | return node; |
5229 | } |
5230 | case vsub4S_rule: { |
5231 | vsub4SNode *node = new vsub4SNode(); |
5232 | node->_bottom_type = _leaf->bottom_type(); |
5233 | return node; |
5234 | } |
5235 | case vsub4S_reg_rule: { |
5236 | vsub4S_regNode *node = new vsub4S_regNode(); |
5237 | node->_bottom_type = _leaf->bottom_type(); |
5238 | return node; |
5239 | } |
5240 | case vsub4S_mem_rule: { |
5241 | vsub4S_memNode *node = new vsub4S_memNode(); |
5242 | node->_bottom_type = _leaf->bottom_type(); |
5243 | return node; |
5244 | } |
5245 | case vsub8S_rule: { |
5246 | vsub8SNode *node = new vsub8SNode(); |
5247 | node->_bottom_type = _leaf->bottom_type(); |
5248 | return node; |
5249 | } |
5250 | case vsub8S_reg_rule: { |
5251 | vsub8S_regNode *node = new vsub8S_regNode(); |
5252 | node->_bottom_type = _leaf->bottom_type(); |
5253 | return node; |
5254 | } |
5255 | case vsub8S_mem_rule: { |
5256 | vsub8S_memNode *node = new vsub8S_memNode(); |
5257 | node->_bottom_type = _leaf->bottom_type(); |
5258 | return node; |
5259 | } |
5260 | case vsub16S_reg_rule: { |
5261 | vsub16S_regNode *node = new vsub16S_regNode(); |
5262 | node->_bottom_type = _leaf->bottom_type(); |
5263 | return node; |
5264 | } |
5265 | case vsub16S_mem_rule: { |
5266 | vsub16S_memNode *node = new vsub16S_memNode(); |
5267 | node->_bottom_type = _leaf->bottom_type(); |
5268 | return node; |
5269 | } |
5270 | case vsub32S_reg_rule: { |
5271 | vsub32S_regNode *node = new vsub32S_regNode(); |
5272 | node->_bottom_type = _leaf->bottom_type(); |
5273 | return node; |
5274 | } |
5275 | case vsub32S_mem_rule: { |
5276 | vsub32S_memNode *node = new vsub32S_memNode(); |
5277 | node->_bottom_type = _leaf->bottom_type(); |
5278 | return node; |
5279 | } |
5280 | case vsub2I_rule: { |
5281 | vsub2INode *node = new vsub2INode(); |
5282 | node->_bottom_type = _leaf->bottom_type(); |
5283 | return node; |
5284 | } |
5285 | case vsub2I_reg_rule: { |
5286 | vsub2I_regNode *node = new vsub2I_regNode(); |
5287 | node->_bottom_type = _leaf->bottom_type(); |
5288 | return node; |
5289 | } |
5290 | case vsub2I_mem_rule: { |
5291 | vsub2I_memNode *node = new vsub2I_memNode(); |
5292 | node->_bottom_type = _leaf->bottom_type(); |
5293 | return node; |
5294 | } |
5295 | case vsub4I_rule: { |
5296 | vsub4INode *node = new vsub4INode(); |
5297 | node->_bottom_type = _leaf->bottom_type(); |
5298 | return node; |
5299 | } |
5300 | case vsub4I_reg_rule: { |
5301 | vsub4I_regNode *node = new vsub4I_regNode(); |
5302 | node->_bottom_type = _leaf->bottom_type(); |
5303 | return node; |
5304 | } |
5305 | case vsub4I_mem_rule: { |
5306 | vsub4I_memNode *node = new vsub4I_memNode(); |
5307 | node->_bottom_type = _leaf->bottom_type(); |
5308 | return node; |
5309 | } |
5310 | case vsub8I_reg_rule: { |
5311 | vsub8I_regNode *node = new vsub8I_regNode(); |
5312 | node->_bottom_type = _leaf->bottom_type(); |
5313 | return node; |
5314 | } |
5315 | case vsub8I_mem_rule: { |
5316 | vsub8I_memNode *node = new vsub8I_memNode(); |
5317 | node->_bottom_type = _leaf->bottom_type(); |
5318 | return node; |
5319 | } |
5320 | case vsub16I_reg_rule: { |
5321 | vsub16I_regNode *node = new vsub16I_regNode(); |
5322 | node->_bottom_type = _leaf->bottom_type(); |
5323 | return node; |
5324 | } |
5325 | case vsub16I_mem_rule: { |
5326 | vsub16I_memNode *node = new vsub16I_memNode(); |
5327 | node->_bottom_type = _leaf->bottom_type(); |
5328 | return node; |
5329 | } |
5330 | case vsub2L_rule: { |
5331 | vsub2LNode *node = new vsub2LNode(); |
5332 | node->_bottom_type = _leaf->bottom_type(); |
5333 | return node; |
5334 | } |
5335 | case vsub2L_reg_rule: { |
5336 | vsub2L_regNode *node = new vsub2L_regNode(); |
5337 | node->_bottom_type = _leaf->bottom_type(); |
5338 | return node; |
5339 | } |
5340 | case vsub2L_mem_rule: { |
5341 | vsub2L_memNode *node = new vsub2L_memNode(); |
5342 | node->_bottom_type = _leaf->bottom_type(); |
5343 | return node; |
5344 | } |
5345 | case vsub4L_reg_rule: { |
5346 | vsub4L_regNode *node = new vsub4L_regNode(); |
5347 | node->_bottom_type = _leaf->bottom_type(); |
5348 | return node; |
5349 | } |
5350 | case vsub4L_mem_rule: { |
5351 | vsub4L_memNode *node = new vsub4L_memNode(); |
5352 | node->_bottom_type = _leaf->bottom_type(); |
5353 | return node; |
5354 | } |
5355 | case vsub8L_reg_rule: { |
5356 | vsub8L_regNode *node = new vsub8L_regNode(); |
5357 | node->_bottom_type = _leaf->bottom_type(); |
5358 | return node; |
5359 | } |
5360 | case vsub8L_mem_rule: { |
5361 | vsub8L_memNode *node = new vsub8L_memNode(); |
5362 | node->_bottom_type = _leaf->bottom_type(); |
5363 | return node; |
5364 | } |
5365 | case vsub2F_rule: { |
5366 | vsub2FNode *node = new vsub2FNode(); |
5367 | node->_bottom_type = _leaf->bottom_type(); |
5368 | return node; |
5369 | } |
5370 | case vsub2F_reg_rule: { |
5371 | vsub2F_regNode *node = new vsub2F_regNode(); |
5372 | node->_bottom_type = _leaf->bottom_type(); |
5373 | return node; |
5374 | } |
5375 | case vsub2F_mem_rule: { |
5376 | vsub2F_memNode *node = new vsub2F_memNode(); |
5377 | node->_bottom_type = _leaf->bottom_type(); |
5378 | return node; |
5379 | } |
5380 | case vsub4F_rule: { |
5381 | vsub4FNode *node = new vsub4FNode(); |
5382 | node->_bottom_type = _leaf->bottom_type(); |
5383 | return node; |
5384 | } |
5385 | case vsub4F_reg_rule: { |
5386 | vsub4F_regNode *node = new vsub4F_regNode(); |
5387 | node->_bottom_type = _leaf->bottom_type(); |
5388 | return node; |
5389 | } |
5390 | case vsub4F_mem_rule: { |
5391 | vsub4F_memNode *node = new vsub4F_memNode(); |
5392 | node->_bottom_type = _leaf->bottom_type(); |
5393 | return node; |
5394 | } |
5395 | case vsub8F_reg_rule: { |
5396 | vsub8F_regNode *node = new vsub8F_regNode(); |
5397 | node->_bottom_type = _leaf->bottom_type(); |
5398 | return node; |
5399 | } |
5400 | case vsub8F_mem_rule: { |
5401 | vsub8F_memNode *node = new vsub8F_memNode(); |
5402 | node->_bottom_type = _leaf->bottom_type(); |
5403 | return node; |
5404 | } |
5405 | case vsub16F_reg_rule: { |
5406 | vsub16F_regNode *node = new vsub16F_regNode(); |
5407 | node->_bottom_type = _leaf->bottom_type(); |
5408 | return node; |
5409 | } |
5410 | case vsub16F_mem_rule: { |
5411 | vsub16F_memNode *node = new vsub16F_memNode(); |
5412 | node->_bottom_type = _leaf->bottom_type(); |
5413 | return node; |
5414 | } |
5415 | case vsub2D_rule: { |
5416 | vsub2DNode *node = new vsub2DNode(); |
5417 | node->_bottom_type = _leaf->bottom_type(); |
5418 | return node; |
5419 | } |
5420 | case vsub2D_reg_rule: { |
5421 | vsub2D_regNode *node = new vsub2D_regNode(); |
5422 | node->_bottom_type = _leaf->bottom_type(); |
5423 | return node; |
5424 | } |
5425 | case vsub2D_mem_rule: { |
5426 | vsub2D_memNode *node = new vsub2D_memNode(); |
5427 | node->_bottom_type = _leaf->bottom_type(); |
5428 | return node; |
5429 | } |
5430 | case vsub4D_reg_rule: { |
5431 | vsub4D_regNode *node = new vsub4D_regNode(); |
5432 | node->_bottom_type = _leaf->bottom_type(); |
5433 | return node; |
5434 | } |
5435 | case vsub4D_mem_rule: { |
5436 | vsub4D_memNode *node = new vsub4D_memNode(); |
5437 | node->_bottom_type = _leaf->bottom_type(); |
5438 | return node; |
5439 | } |
5440 | case vsub8D_reg_rule: { |
5441 | vsub8D_regNode *node = new vsub8D_regNode(); |
5442 | node->_bottom_type = _leaf->bottom_type(); |
5443 | return node; |
5444 | } |
5445 | case vsub8D_mem_rule: { |
5446 | vsub8D_memNode *node = new vsub8D_memNode(); |
5447 | node->_bottom_type = _leaf->bottom_type(); |
5448 | return node; |
5449 | } |
5450 | case mul4B_reg_rule: { |
5451 | mul4B_regNode *node = new mul4B_regNode(); |
5452 | node->set_opnd_array(3, MachOperGenerator(VECS)); |
5453 | node->set_opnd_array(4, MachOperGenerator(VECS)); |
5454 | node->set_opnd_array(5, MachOperGenerator(RREGI)); |
5455 | node->_bottom_type = _leaf->bottom_type(); |
5456 | return node; |
5457 | } |
5458 | case mul8B_reg_rule: { |
5459 | mul8B_regNode *node = new mul8B_regNode(); |
5460 | node->set_opnd_array(3, MachOperGenerator(VECD)); |
5461 | node->set_opnd_array(4, MachOperGenerator(VECD)); |
5462 | node->set_opnd_array(5, MachOperGenerator(RREGI)); |
5463 | node->_bottom_type = _leaf->bottom_type(); |
5464 | return node; |
5465 | } |
5466 | case mul16B_reg_rule: { |
5467 | mul16B_regNode *node = new mul16B_regNode(); |
5468 | node->set_opnd_array(3, MachOperGenerator(VECX)); |
5469 | node->set_opnd_array(4, MachOperGenerator(VECX)); |
5470 | node->set_opnd_array(5, MachOperGenerator(VECX)); |
5471 | node->set_opnd_array(6, MachOperGenerator(RREGI)); |
5472 | node->_bottom_type = _leaf->bottom_type(); |
5473 | return node; |
5474 | } |
5475 | case vmul16B_reg_avx_rule: { |
5476 | vmul16B_reg_avxNode *node = new vmul16B_reg_avxNode(); |
5477 | node->set_opnd_array(3, MachOperGenerator(VECX)); |
5478 | node->set_opnd_array(4, MachOperGenerator(VECX)); |
5479 | node->set_opnd_array(5, MachOperGenerator(RREGI)); |
5480 | node->_bottom_type = _leaf->bottom_type(); |
5481 | return node; |
5482 | } |
5483 | case vmul32B_reg_avx_rule: { |
5484 | vmul32B_reg_avxNode *node = new vmul32B_reg_avxNode(); |
5485 | node->set_opnd_array(3, MachOperGenerator(VECY)); |
5486 | node->set_opnd_array(4, MachOperGenerator(VECY)); |
5487 | node->set_opnd_array(5, MachOperGenerator(VECY)); |
5488 | node->set_opnd_array(6, MachOperGenerator(RREGI)); |
5489 | node->_bottom_type = _leaf->bottom_type(); |
5490 | return node; |
5491 | } |
5492 | case vmul64B_reg_avx_rule: { |
5493 | vmul64B_reg_avxNode *node = new vmul64B_reg_avxNode(); |
5494 | node->set_opnd_array(3, MachOperGenerator(VECZ)); |
5495 | node->set_opnd_array(4, MachOperGenerator(VECZ)); |
5496 | node->set_opnd_array(5, MachOperGenerator(VECZ)); |
5497 | node->set_opnd_array(6, MachOperGenerator(RREGI)); |
5498 | node->_bottom_type = _leaf->bottom_type(); |
5499 | return node; |
5500 | } |
5501 | case vmul2S_rule: { |
5502 | vmul2SNode *node = new vmul2SNode(); |
5503 | node->_bottom_type = _leaf->bottom_type(); |
5504 | return node; |
5505 | } |
5506 | case vmul2S_reg_rule: { |
5507 | vmul2S_regNode *node = new vmul2S_regNode(); |
5508 | node->_bottom_type = _leaf->bottom_type(); |
5509 | return node; |
5510 | } |
5511 | case vmul2S_mem_rule: { |
5512 | vmul2S_memNode *node = new vmul2S_memNode(); |
5513 | node->_bottom_type = _leaf->bottom_type(); |
5514 | return node; |
5515 | } |
5516 | case vmul2S_mem_0_rule: { |
5517 | vmul2S_mem_0Node *node = new vmul2S_mem_0Node(); |
5518 | node->_bottom_type = _leaf->bottom_type(); |
5519 | return node; |
5520 | } |
5521 | case vmul4S_rule: { |
5522 | vmul4SNode *node = new vmul4SNode(); |
5523 | node->_bottom_type = _leaf->bottom_type(); |
5524 | return node; |
5525 | } |
5526 | case vmul4S_reg_rule: { |
5527 | vmul4S_regNode *node = new vmul4S_regNode(); |
5528 | node->_bottom_type = _leaf->bottom_type(); |
5529 | return node; |
5530 | } |
5531 | case vmul4S_mem_rule: { |
5532 | vmul4S_memNode *node = new vmul4S_memNode(); |
5533 | node->_bottom_type = _leaf->bottom_type(); |
5534 | return node; |
5535 | } |
5536 | case vmul4S_mem_0_rule: { |
5537 | vmul4S_mem_0Node *node = new vmul4S_mem_0Node(); |
5538 | node->_bottom_type = _leaf->bottom_type(); |
5539 | return node; |
5540 | } |
5541 | case vmul8S_rule: { |
5542 | vmul8SNode *node = new vmul8SNode(); |
5543 | node->_bottom_type = _leaf->bottom_type(); |
5544 | return node; |
5545 | } |
5546 | case vmul8S_reg_rule: { |
5547 | vmul8S_regNode *node = new vmul8S_regNode(); |
5548 | node->_bottom_type = _leaf->bottom_type(); |
5549 | return node; |
5550 | } |
5551 | case vmul8S_mem_rule: { |
5552 | vmul8S_memNode *node = new vmul8S_memNode(); |
5553 | node->_bottom_type = _leaf->bottom_type(); |
5554 | return node; |
5555 | } |
5556 | case vmul8S_mem_0_rule: { |
5557 | vmul8S_mem_0Node *node = new vmul8S_mem_0Node(); |
5558 | node->_bottom_type = _leaf->bottom_type(); |
5559 | return node; |
5560 | } |
5561 | case vmul16S_reg_rule: { |
5562 | vmul16S_regNode *node = new vmul16S_regNode(); |
5563 | node->_bottom_type = _leaf->bottom_type(); |
5564 | return node; |
5565 | } |
5566 | case vmul16S_mem_rule: { |
5567 | vmul16S_memNode *node = new vmul16S_memNode(); |
5568 | node->_bottom_type = _leaf->bottom_type(); |
5569 | return node; |
5570 | } |
5571 | case vmul16S_mem_0_rule: { |
5572 | vmul16S_mem_0Node *node = new vmul16S_mem_0Node(); |
5573 | node->_bottom_type = _leaf->bottom_type(); |
5574 | return node; |
5575 | } |
5576 | case vmul32S_reg_rule: { |
5577 | vmul32S_regNode *node = new vmul32S_regNode(); |
5578 | node->_bottom_type = _leaf->bottom_type(); |
5579 | return node; |
5580 | } |
5581 | case vmul32S_mem_rule: { |
5582 | vmul32S_memNode *node = new vmul32S_memNode(); |
5583 | node->_bottom_type = _leaf->bottom_type(); |
5584 | return node; |
5585 | } |
5586 | case vmul32S_mem_0_rule: { |
5587 | vmul32S_mem_0Node *node = new vmul32S_mem_0Node(); |
5588 | node->_bottom_type = _leaf->bottom_type(); |
5589 | return node; |
5590 | } |
5591 | case vmul2I_rule: { |
5592 | vmul2INode *node = new vmul2INode(); |
5593 | node->_bottom_type = _leaf->bottom_type(); |
5594 | return node; |
5595 | } |
5596 | case vmul2I_reg_rule: { |
5597 | vmul2I_regNode *node = new vmul2I_regNode(); |
5598 | node->_bottom_type = _leaf->bottom_type(); |
5599 | return node; |
5600 | } |
5601 | case vmul2I_mem_rule: { |
5602 | vmul2I_memNode *node = new vmul2I_memNode(); |
5603 | node->_bottom_type = _leaf->bottom_type(); |
5604 | return node; |
5605 | } |
5606 | case vmul2I_mem_0_rule: { |
5607 | vmul2I_mem_0Node *node = new vmul2I_mem_0Node(); |
5608 | node->_bottom_type = _leaf->bottom_type(); |
5609 | return node; |
5610 | } |
5611 | case vmul4I_rule: { |
5612 | vmul4INode *node = new vmul4INode(); |
5613 | node->_bottom_type = _leaf->bottom_type(); |
5614 | return node; |
5615 | } |
5616 | case vmul4I_reg_rule: { |
5617 | vmul4I_regNode *node = new vmul4I_regNode(); |
5618 | node->_bottom_type = _leaf->bottom_type(); |
5619 | return node; |
5620 | } |
5621 | case vmul4I_mem_rule: { |
5622 | vmul4I_memNode *node = new vmul4I_memNode(); |
5623 | node->_bottom_type = _leaf->bottom_type(); |
5624 | return node; |
5625 | } |
5626 | case vmul4I_mem_0_rule: { |
5627 | vmul4I_mem_0Node *node = new vmul4I_mem_0Node(); |
5628 | node->_bottom_type = _leaf->bottom_type(); |
5629 | return node; |
5630 | } |
5631 | case vmul2L_reg_rule: { |
5632 | vmul2L_regNode *node = new vmul2L_regNode(); |
5633 | node->_bottom_type = _leaf->bottom_type(); |
5634 | return node; |
5635 | } |
5636 | case vmul2L_mem_rule: { |
5637 | vmul2L_memNode *node = new vmul2L_memNode(); |
5638 | node->_bottom_type = _leaf->bottom_type(); |
5639 | return node; |
5640 | } |
5641 | case vmul2L_mem_0_rule: { |
5642 | vmul2L_mem_0Node *node = new vmul2L_mem_0Node(); |
5643 | node->_bottom_type = _leaf->bottom_type(); |
5644 | return node; |
5645 | } |
5646 | case vmul4L_reg_rule: { |
5647 | vmul4L_regNode *node = new vmul4L_regNode(); |
5648 | node->_bottom_type = _leaf->bottom_type(); |
5649 | return node; |
5650 | } |
5651 | case vmul4L_mem_rule: { |
5652 | vmul4L_memNode *node = new vmul4L_memNode(); |
5653 | node->_bottom_type = _leaf->bottom_type(); |
5654 | return node; |
5655 | } |
5656 | case vmul4L_mem_0_rule: { |
5657 | vmul4L_mem_0Node *node = new vmul4L_mem_0Node(); |
5658 | node->_bottom_type = _leaf->bottom_type(); |
5659 | return node; |
5660 | } |
5661 | case vmul8L_reg_rule: { |
5662 | vmul8L_regNode *node = new vmul8L_regNode(); |
5663 | node->_bottom_type = _leaf->bottom_type(); |
5664 | return node; |
5665 | } |
5666 | case vmul8L_mem_rule: { |
5667 | vmul8L_memNode *node = new vmul8L_memNode(); |
5668 | node->_bottom_type = _leaf->bottom_type(); |
5669 | return node; |
5670 | } |
5671 | case vmul8L_mem_0_rule: { |
5672 | vmul8L_mem_0Node *node = new vmul8L_mem_0Node(); |
5673 | node->_bottom_type = _leaf->bottom_type(); |
5674 | return node; |
5675 | } |
5676 | case vmul8I_reg_rule: { |
5677 | vmul8I_regNode *node = new vmul8I_regNode(); |
5678 | node->_bottom_type = _leaf->bottom_type(); |
5679 | return node; |
5680 | } |
5681 | case vmul8I_mem_rule: { |
5682 | vmul8I_memNode *node = new vmul8I_memNode(); |
5683 | node->_bottom_type = _leaf->bottom_type(); |
5684 | return node; |
5685 | } |
5686 | case vmul8I_mem_0_rule: { |
5687 | vmul8I_mem_0Node *node = new vmul8I_mem_0Node(); |
5688 | node->_bottom_type = _leaf->bottom_type(); |
5689 | return node; |
5690 | } |
5691 | case vmul16I_reg_rule: { |
5692 | vmul16I_regNode *node = new vmul16I_regNode(); |
5693 | node->_bottom_type = _leaf->bottom_type(); |
5694 | return node; |
5695 | } |
5696 | case vmul16I_mem_rule: { |
5697 | vmul16I_memNode *node = new vmul16I_memNode(); |
5698 | node->_bottom_type = _leaf->bottom_type(); |
5699 | return node; |
5700 | } |
5701 | case vmul16I_mem_0_rule: { |
5702 | vmul16I_mem_0Node *node = new vmul16I_mem_0Node(); |
5703 | node->_bottom_type = _leaf->bottom_type(); |
5704 | return node; |
5705 | } |
5706 | case vmul2F_rule: { |
5707 | vmul2FNode *node = new vmul2FNode(); |
5708 | node->_bottom_type = _leaf->bottom_type(); |
5709 | return node; |
5710 | } |
5711 | case vmul2F_reg_rule: { |
5712 | vmul2F_regNode *node = new vmul2F_regNode(); |
5713 | node->_bottom_type = _leaf->bottom_type(); |
5714 | return node; |
5715 | } |
5716 | case vmul2F_mem_rule: { |
5717 | vmul2F_memNode *node = new vmul2F_memNode(); |
5718 | node->_bottom_type = _leaf->bottom_type(); |
5719 | return node; |
5720 | } |
5721 | case vmul2F_mem_0_rule: { |
5722 | vmul2F_mem_0Node *node = new vmul2F_mem_0Node(); |
5723 | node->_bottom_type = _leaf->bottom_type(); |
5724 | return node; |
5725 | } |
5726 | case vmul4F_rule: { |
5727 | vmul4FNode *node = new vmul4FNode(); |
5728 | node->_bottom_type = _leaf->bottom_type(); |
5729 | return node; |
5730 | } |
5731 | case vmul4F_reg_rule: { |
5732 | vmul4F_regNode *node = new vmul4F_regNode(); |
5733 | node->_bottom_type = _leaf->bottom_type(); |
5734 | return node; |
5735 | } |
5736 | case vmul4F_mem_rule: { |
5737 | vmul4F_memNode *node = new vmul4F_memNode(); |
5738 | node->_bottom_type = _leaf->bottom_type(); |
5739 | return node; |
5740 | } |
5741 | case vmul4F_mem_0_rule: { |
5742 | vmul4F_mem_0Node *node = new vmul4F_mem_0Node(); |
5743 | node->_bottom_type = _leaf->bottom_type(); |
5744 | return node; |
5745 | } |
5746 | case vmul8F_reg_rule: { |
5747 | vmul8F_regNode *node = new vmul8F_regNode(); |
5748 | node->_bottom_type = _leaf->bottom_type(); |
5749 | return node; |
5750 | } |
5751 | case vmul8F_mem_rule: { |
5752 | vmul8F_memNode *node = new vmul8F_memNode(); |
5753 | node->_bottom_type = _leaf->bottom_type(); |
5754 | return node; |
5755 | } |
5756 | case vmul8F_mem_0_rule: { |
5757 | vmul8F_mem_0Node *node = new vmul8F_mem_0Node(); |
5758 | node->_bottom_type = _leaf->bottom_type(); |
5759 | return node; |
5760 | } |
5761 | case vmul16F_reg_rule: { |
5762 | vmul16F_regNode *node = new vmul16F_regNode(); |
5763 | node->_bottom_type = _leaf->bottom_type(); |
5764 | return node; |
5765 | } |
5766 | case vmul16F_mem_rule: { |
5767 | vmul16F_memNode *node = new vmul16F_memNode(); |
5768 | node->_bottom_type = _leaf->bottom_type(); |
5769 | return node; |
5770 | } |
5771 | case vmul16F_mem_0_rule: { |
5772 | vmul16F_mem_0Node *node = new vmul16F_mem_0Node(); |
5773 | node->_bottom_type = _leaf->bottom_type(); |
5774 | return node; |
5775 | } |
5776 | case vmul2D_rule: { |
5777 | vmul2DNode *node = new vmul2DNode(); |
5778 | node->_bottom_type = _leaf->bottom_type(); |
5779 | return node; |
5780 | } |
5781 | case vmul2D_reg_rule: { |
5782 | vmul2D_regNode *node = new vmul2D_regNode(); |
5783 | node->_bottom_type = _leaf->bottom_type(); |
5784 | return node; |
5785 | } |
5786 | case vmul2D_mem_rule: { |
5787 | vmul2D_memNode *node = new vmul2D_memNode(); |
5788 | node->_bottom_type = _leaf->bottom_type(); |
5789 | return node; |
5790 | } |
5791 | case vmul2D_mem_0_rule: { |
5792 | vmul2D_mem_0Node *node = new vmul2D_mem_0Node(); |
5793 | node->_bottom_type = _leaf->bottom_type(); |
5794 | return node; |
5795 | } |
5796 | case vmul4D_reg_rule: { |
5797 | vmul4D_regNode *node = new vmul4D_regNode(); |
5798 | node->_bottom_type = _leaf->bottom_type(); |
5799 | return node; |
5800 | } |
5801 | case vmul4D_mem_rule: { |
5802 | vmul4D_memNode *node = new vmul4D_memNode(); |
5803 | node->_bottom_type = _leaf->bottom_type(); |
5804 | return node; |
5805 | } |
5806 | case vmul4D_mem_0_rule: { |
5807 | vmul4D_mem_0Node *node = new vmul4D_mem_0Node(); |
5808 | node->_bottom_type = _leaf->bottom_type(); |
5809 | return node; |
5810 | } |
5811 | case vmul8D_reg_rule: { |
5812 | vmul8D_regNode *node = new vmul8D_regNode(); |
5813 | node->_bottom_type = _leaf->bottom_type(); |
5814 | return node; |
5815 | } |
5816 | case vmul8D_mem_rule: { |
5817 | vmul8D_memNode *node = new vmul8D_memNode(); |
5818 | node->_bottom_type = _leaf->bottom_type(); |
5819 | return node; |
5820 | } |
5821 | case vmul8D_mem_0_rule: { |
5822 | vmul8D_mem_0Node *node = new vmul8D_mem_0Node(); |
5823 | node->_bottom_type = _leaf->bottom_type(); |
5824 | return node; |
5825 | } |
5826 | case vcmov8F_reg_rule: { |
5827 | vcmov8F_regNode *node = new vcmov8F_regNode(); |
5828 | node->set_opnd_array(5, MachOperGenerator(LEGVECY)); |
5829 | node->_bottom_type = _leaf->bottom_type(); |
5830 | return node; |
5831 | } |
5832 | case vcmov4D_reg_rule: { |
5833 | vcmov4D_regNode *node = new vcmov4D_regNode(); |
5834 | node->set_opnd_array(5, MachOperGenerator(LEGVECY)); |
5835 | node->_bottom_type = _leaf->bottom_type(); |
5836 | return node; |
5837 | } |
5838 | case vdiv2F_rule: { |
5839 | vdiv2FNode *node = new vdiv2FNode(); |
5840 | node->_bottom_type = _leaf->bottom_type(); |
5841 | return node; |
5842 | } |
5843 | case vdiv2F_reg_rule: { |
5844 | vdiv2F_regNode *node = new vdiv2F_regNode(); |
5845 | node->_bottom_type = _leaf->bottom_type(); |
5846 | return node; |
5847 | } |
5848 | case vdiv2F_mem_rule: { |
5849 | vdiv2F_memNode *node = new vdiv2F_memNode(); |
5850 | node->_bottom_type = _leaf->bottom_type(); |
5851 | return node; |
5852 | } |
5853 | case vdiv4F_rule: { |
5854 | vdiv4FNode *node = new vdiv4FNode(); |
5855 | node->_bottom_type = _leaf->bottom_type(); |
5856 | return node; |
5857 | } |
5858 | case vdiv4F_reg_rule: { |
5859 | vdiv4F_regNode *node = new vdiv4F_regNode(); |
5860 | node->_bottom_type = _leaf->bottom_type(); |
5861 | return node; |
5862 | } |
5863 | case vdiv4F_mem_rule: { |
5864 | vdiv4F_memNode *node = new vdiv4F_memNode(); |
5865 | node->_bottom_type = _leaf->bottom_type(); |
5866 | return node; |
5867 | } |
5868 | case vdiv8F_reg_rule: { |
5869 | vdiv8F_regNode *node = new vdiv8F_regNode(); |
5870 | node->_bottom_type = _leaf->bottom_type(); |
5871 | return node; |
5872 | } |
5873 | case vdiv8F_mem_rule: { |
5874 | vdiv8F_memNode *node = new vdiv8F_memNode(); |
5875 | node->_bottom_type = _leaf->bottom_type(); |
5876 | return node; |
5877 | } |
5878 | case vdiv16F_reg_rule: { |
5879 | vdiv16F_regNode *node = new vdiv16F_regNode(); |
5880 | node->_bottom_type = _leaf->bottom_type(); |
5881 | return node; |
5882 | } |
5883 | case vdiv16F_mem_rule: { |
5884 | vdiv16F_memNode *node = new vdiv16F_memNode(); |
5885 | node->_bottom_type = _leaf->bottom_type(); |
5886 | return node; |
5887 | } |
5888 | case vdiv2D_rule: { |
5889 | vdiv2DNode *node = new vdiv2DNode(); |
5890 | node->_bottom_type = _leaf->bottom_type(); |
5891 | return node; |
5892 | } |
5893 | case vdiv2D_reg_rule: { |
5894 | vdiv2D_regNode *node = new vdiv2D_regNode(); |
5895 | node->_bottom_type = _leaf->bottom_type(); |
5896 | return node; |
5897 | } |
5898 | case vdiv2D_mem_rule: { |
5899 | vdiv2D_memNode *node = new vdiv2D_memNode(); |
5900 | node->_bottom_type = _leaf->bottom_type(); |
5901 | return node; |
5902 | } |
5903 | case vdiv4D_reg_rule: { |
5904 | vdiv4D_regNode *node = new vdiv4D_regNode(); |
5905 | node->_bottom_type = _leaf->bottom_type(); |
5906 | return node; |
5907 | } |
5908 | case vdiv4D_mem_rule: { |
5909 | vdiv4D_memNode *node = new vdiv4D_memNode(); |
5910 | node->_bottom_type = _leaf->bottom_type(); |
5911 | return node; |
5912 | } |
5913 | case vdiv8D_reg_rule: { |
5914 | vdiv8D_regNode *node = new vdiv8D_regNode(); |
5915 | node->_bottom_type = _leaf->bottom_type(); |
5916 | return node; |
5917 | } |
5918 | case vdiv8D_mem_rule: { |
5919 | vdiv8D_memNode *node = new vdiv8D_memNode(); |
5920 | node->_bottom_type = _leaf->bottom_type(); |
5921 | return node; |
5922 | } |
5923 | case vsqrt2D_reg_rule: { |
5924 | vsqrt2D_regNode *node = new vsqrt2D_regNode(); |
5925 | node->_bottom_type = _leaf->bottom_type(); |
5926 | return node; |
5927 | } |
5928 | case vsqrt2D_mem_rule: { |
5929 | vsqrt2D_memNode *node = new vsqrt2D_memNode(); |
5930 | node->_bottom_type = _leaf->bottom_type(); |
5931 | return node; |
5932 | } |
5933 | case vsqrt4D_reg_rule: { |
5934 | vsqrt4D_regNode *node = new vsqrt4D_regNode(); |
5935 | node->_bottom_type = _leaf->bottom_type(); |
5936 | return node; |
5937 | } |
5938 | case vsqrt4D_mem_rule: { |
5939 | vsqrt4D_memNode *node = new vsqrt4D_memNode(); |
5940 | node->_bottom_type = _leaf->bottom_type(); |
5941 | return node; |
5942 | } |
5943 | case vsqrt8D_reg_rule: { |
5944 | vsqrt8D_regNode *node = new vsqrt8D_regNode(); |
5945 | node->_bottom_type = _leaf->bottom_type(); |
5946 | return node; |
5947 | } |
5948 | case vsqrt8D_mem_rule: { |
5949 | vsqrt8D_memNode *node = new vsqrt8D_memNode(); |
5950 | node->_bottom_type = _leaf->bottom_type(); |
5951 | return node; |
5952 | } |
5953 | case vsqrt2F_reg_rule: { |
5954 | vsqrt2F_regNode *node = new vsqrt2F_regNode(); |
5955 | node->_bottom_type = _leaf->bottom_type(); |
5956 | return node; |
5957 | } |
5958 | case vsqrt2F_mem_rule: { |
5959 | vsqrt2F_memNode *node = new vsqrt2F_memNode(); |
5960 | node->_bottom_type = _leaf->bottom_type(); |
5961 | return node; |
5962 | } |
5963 | case vsqrt4F_reg_rule: { |
5964 | vsqrt4F_regNode *node = new vsqrt4F_regNode(); |
5965 | node->_bottom_type = _leaf->bottom_type(); |
5966 | return node; |
5967 | } |
5968 | case vsqrt4F_mem_rule: { |
5969 | vsqrt4F_memNode *node = new vsqrt4F_memNode(); |
5970 | node->_bottom_type = _leaf->bottom_type(); |
5971 | return node; |
5972 | } |
5973 | case vsqrt8F_reg_rule: { |
5974 | vsqrt8F_regNode *node = new vsqrt8F_regNode(); |
5975 | node->_bottom_type = _leaf->bottom_type(); |
5976 | return node; |
5977 | } |
5978 | case vsqrt8F_mem_rule: { |
5979 | vsqrt8F_memNode *node = new vsqrt8F_memNode(); |
5980 | node->_bottom_type = _leaf->bottom_type(); |
5981 | return node; |
5982 | } |
5983 | case vsqrt16F_reg_rule: { |
5984 | vsqrt16F_regNode *node = new vsqrt16F_regNode(); |
5985 | node->_bottom_type = _leaf->bottom_type(); |
5986 | return node; |
5987 | } |
5988 | case vsqrt16F_mem_rule: { |
5989 | vsqrt16F_memNode *node = new vsqrt16F_memNode(); |
5990 | node->_bottom_type = _leaf->bottom_type(); |
5991 | return node; |
5992 | } |
5993 | case vshiftcnt_rule: { |
5994 | vshiftcntNode *node = new vshiftcntNode(); |
5995 | node->_bottom_type = _leaf->bottom_type(); |
5996 | return node; |
5997 | } |
5998 | case vshiftcnt_0_rule: { |
5999 | vshiftcnt_0Node *node = new vshiftcnt_0Node(); |
6000 | node->_bottom_type = _leaf->bottom_type(); |
6001 | return node; |
6002 | } |
6003 | case vshiftcntimm_rule: { |
6004 | vshiftcntimmNode *node = new vshiftcntimmNode(); |
6005 | node->set_opnd_array(2, MachOperGenerator(RREGI)); |
6006 | return node; |
6007 | } |
6008 | case vshift4B_rule: { |
6009 | vshift4BNode *node = new vshift4BNode(); |
6010 | node->set_opnd_array(3, MachOperGenerator(VECS)); |
6011 | node->set_opnd_array(4, MachOperGenerator(VECS)); |
6012 | node->set_opnd_array(5, MachOperGenerator(RREGI)); |
6013 | node->_bottom_type = _leaf->bottom_type(); |
6014 | return node; |
6015 | } |
6016 | case vshift4B_0_rule: { |
6017 | vshift4B_0Node *node = new vshift4B_0Node(); |
6018 | node->set_opnd_array(3, MachOperGenerator(VECS)); |
6019 | node->set_opnd_array(4, MachOperGenerator(VECS)); |
6020 | node->set_opnd_array(5, MachOperGenerator(RREGI)); |
6021 | node->_bottom_type = _leaf->bottom_type(); |
6022 | return node; |
6023 | } |
6024 | case vshift4B_1_rule: { |
6025 | vshift4B_1Node *node = new vshift4B_1Node(); |
6026 | node->set_opnd_array(3, MachOperGenerator(VECS)); |
6027 | node->set_opnd_array(4, MachOperGenerator(VECS)); |
6028 | node->set_opnd_array(5, MachOperGenerator(RREGI)); |
6029 | node->_bottom_type = _leaf->bottom_type(); |
6030 | return node; |
6031 | } |
6032 | case vshift8B_rule: { |
6033 | vshift8BNode *node = new vshift8BNode(); |
6034 | node->set_opnd_array(3, MachOperGenerator(VECD)); |
6035 | node->set_opnd_array(4, MachOperGenerator(VECD)); |
6036 | node->set_opnd_array(5, MachOperGenerator(RREGI)); |
6037 | node->_bottom_type = _leaf->bottom_type(); |
6038 | return node; |
6039 | } |
6040 | case vshift8B_0_rule: { |
6041 | vshift8B_0Node *node = new vshift8B_0Node(); |
6042 | node->set_opnd_array(3, MachOperGenerator(VECD)); |
6043 | node->set_opnd_array(4, MachOperGenerator(VECD)); |
6044 | node->set_opnd_array(5, MachOperGenerator(RREGI)); |
6045 | node->_bottom_type = _leaf->bottom_type(); |
6046 | return node; |
6047 | } |
6048 | case vshift8B_1_rule: { |
6049 | vshift8B_1Node *node = new vshift8B_1Node(); |
6050 | node->set_opnd_array(3, MachOperGenerator(VECD)); |
6051 | node->set_opnd_array(4, MachOperGenerator(VECD)); |
6052 | node->set_opnd_array(5, MachOperGenerator(RREGI)); |
6053 | node->_bottom_type = _leaf->bottom_type(); |
6054 | return node; |
6055 | } |
6056 | case vshift16B_rule: { |
6057 | vshift16BNode *node = new vshift16BNode(); |
6058 | node->set_opnd_array(3, MachOperGenerator(VECX)); |
6059 | node->set_opnd_array(4, MachOperGenerator(VECX)); |
6060 | node->set_opnd_array(5, MachOperGenerator(VECX)); |
6061 | node->set_opnd_array(6, MachOperGenerator(RREGI)); |
6062 | node->_bottom_type = _leaf->bottom_type(); |
6063 | return node; |
6064 | } |
6065 | case vshift16B_0_rule: { |
6066 | vshift16B_0Node *node = new vshift16B_0Node(); |
6067 | node->set_opnd_array(3, MachOperGenerator(VECX)); |
6068 | node->set_opnd_array(4, MachOperGenerator(VECX)); |
6069 | node->set_opnd_array(5, MachOperGenerator(VECX)); |
6070 | node->set_opnd_array(6, MachOperGenerator(RREGI)); |
6071 | node->_bottom_type = _leaf->bottom_type(); |
6072 | return node; |
6073 | } |
6074 | case vshift16B_1_rule: { |
6075 | vshift16B_1Node *node = new vshift16B_1Node(); |
6076 | node->set_opnd_array(3, MachOperGenerator(VECX)); |
6077 | node->set_opnd_array(4, MachOperGenerator(VECX)); |
6078 | node->set_opnd_array(5, MachOperGenerator(VECX)); |
6079 | node->set_opnd_array(6, MachOperGenerator(RREGI)); |
6080 | node->_bottom_type = _leaf->bottom_type(); |
6081 | return node; |
6082 | } |
6083 | case vshift16B_avx_rule: { |
6084 | vshift16B_avxNode *node = new vshift16B_avxNode(); |
6085 | node->set_opnd_array(3, MachOperGenerator(VECX)); |
6086 | node->set_opnd_array(4, MachOperGenerator(VECX)); |
6087 | node->set_opnd_array(5, MachOperGenerator(RREGI)); |
6088 | node->_bottom_type = _leaf->bottom_type(); |
6089 | return node; |
6090 | } |
6091 | case vshift16B_avx_0_rule: { |
6092 | vshift16B_avx_0Node *node = new vshift16B_avx_0Node(); |
6093 | node->set_opnd_array(3, MachOperGenerator(VECX)); |
6094 | node->set_opnd_array(4, MachOperGenerator(VECX)); |
6095 | node->set_opnd_array(5, MachOperGenerator(RREGI)); |
6096 | node->_bottom_type = _leaf->bottom_type(); |
6097 | return node; |
6098 | } |
6099 | case vshift16B_avx_1_rule: { |
6100 | vshift16B_avx_1Node *node = new vshift16B_avx_1Node(); |
6101 | node->set_opnd_array(3, MachOperGenerator(VECX)); |
6102 | node->set_opnd_array(4, MachOperGenerator(VECX)); |
6103 | node->set_opnd_array(5, MachOperGenerator(RREGI)); |
6104 | node->_bottom_type = _leaf->bottom_type(); |
6105 | return node; |
6106 | } |
6107 | case vshift32B_avx_rule: { |
6108 | vshift32B_avxNode *node = new vshift32B_avxNode(); |
6109 | node->set_opnd_array(3, MachOperGenerator(VECY)); |
6110 | node->set_opnd_array(4, MachOperGenerator(VECY)); |
6111 | node->set_opnd_array(5, MachOperGenerator(RREGI)); |
6112 | node->_bottom_type = _leaf->bottom_type(); |
6113 | return node; |
6114 | } |
6115 | case vshift32B_avx_0_rule: { |
6116 | vshift32B_avx_0Node *node = new vshift32B_avx_0Node(); |
6117 | node->set_opnd_array(3, MachOperGenerator(VECY)); |
6118 | node->set_opnd_array(4, MachOperGenerator(VECY)); |
6119 | node->set_opnd_array(5, MachOperGenerator(RREGI)); |
6120 | node->_bottom_type = _leaf->bottom_type(); |
6121 | return node; |
6122 | } |
6123 | case vshift32B_avx_1_rule: { |
6124 | vshift32B_avx_1Node *node = new vshift32B_avx_1Node(); |
6125 | node->set_opnd_array(3, MachOperGenerator(VECY)); |
6126 | node->set_opnd_array(4, MachOperGenerator(VECY)); |
6127 | node->set_opnd_array(5, MachOperGenerator(RREGI)); |
6128 | node->_bottom_type = _leaf->bottom_type(); |
6129 | return node; |
6130 | } |
6131 | case vshift64B_avx_rule: { |
6132 | vshift64B_avxNode *node = new vshift64B_avxNode(); |
6133 | node->set_opnd_array(3, MachOperGenerator(VECZ)); |
6134 | node->set_opnd_array(4, MachOperGenerator(VECZ)); |
6135 | node->set_opnd_array(5, MachOperGenerator(VECZ)); |
6136 | node->set_opnd_array(6, MachOperGenerator(RREGI)); |
6137 | node->_bottom_type = _leaf->bottom_type(); |
6138 | return node; |
6139 | } |
6140 | case vshift64B_avx_0_rule: { |
6141 | vshift64B_avx_0Node *node = new vshift64B_avx_0Node(); |
6142 | node->set_opnd_array(3, MachOperGenerator(VECZ)); |
6143 | node->set_opnd_array(4, MachOperGenerator(VECZ)); |
6144 | node->set_opnd_array(5, MachOperGenerator(VECZ)); |
6145 | node->set_opnd_array(6, MachOperGenerator(RREGI)); |
6146 | node->_bottom_type = _leaf->bottom_type(); |
6147 | return node; |
6148 | } |
6149 | case vshift64B_avx_1_rule: { |
6150 | vshift64B_avx_1Node *node = new vshift64B_avx_1Node(); |
6151 | node->set_opnd_array(3, MachOperGenerator(VECZ)); |
6152 | node->set_opnd_array(4, MachOperGenerator(VECZ)); |
6153 | node->set_opnd_array(5, MachOperGenerator(VECZ)); |
6154 | node->set_opnd_array(6, MachOperGenerator(RREGI)); |
6155 | node->_bottom_type = _leaf->bottom_type(); |
6156 | return node; |
6157 | } |
6158 | case vshist2S_rule: { |
6159 | vshist2SNode *node = new vshist2SNode(); |
6160 | node->set_opnd_array(3, MachOperGenerator(VECS)); |
6161 | node->_bottom_type = _leaf->bottom_type(); |
6162 | return node; |
6163 | } |
6164 | case vshist2S_0_rule: { |
6165 | vshist2S_0Node *node = new vshist2S_0Node(); |
6166 | node->set_opnd_array(3, MachOperGenerator(VECS)); |
6167 | node->_bottom_type = _leaf->bottom_type(); |
6168 | return node; |
6169 | } |
6170 | case vshist2S_1_rule: { |
6171 | vshist2S_1Node *node = new vshist2S_1Node(); |
6172 | node->set_opnd_array(3, MachOperGenerator(VECS)); |
6173 | node->_bottom_type = _leaf->bottom_type(); |
6174 | return node; |
6175 | } |
6176 | case vshift4S_rule: { |
6177 | vshift4SNode *node = new vshift4SNode(); |
6178 | node->set_opnd_array(3, MachOperGenerator(VECD)); |
6179 | node->_bottom_type = _leaf->bottom_type(); |
6180 | return node; |
6181 | } |
6182 | case vshift4S_0_rule: { |
6183 | vshift4S_0Node *node = new vshift4S_0Node(); |
6184 | node->set_opnd_array(3, MachOperGenerator(VECD)); |
6185 | node->_bottom_type = _leaf->bottom_type(); |
6186 | return node; |
6187 | } |
6188 | case vshift4S_1_rule: { |
6189 | vshift4S_1Node *node = new vshift4S_1Node(); |
6190 | node->set_opnd_array(3, MachOperGenerator(VECD)); |
6191 | node->_bottom_type = _leaf->bottom_type(); |
6192 | return node; |
6193 | } |
6194 | case vshift8S_rule: { |
6195 | vshift8SNode *node = new vshift8SNode(); |
6196 | node->set_opnd_array(3, MachOperGenerator(VECX)); |
6197 | node->_bottom_type = _leaf->bottom_type(); |
6198 | return node; |
6199 | } |
6200 | case vshift8S_0_rule: { |
6201 | vshift8S_0Node *node = new vshift8S_0Node(); |
6202 | node->set_opnd_array(3, MachOperGenerator(VECX)); |
6203 | node->_bottom_type = _leaf->bottom_type(); |
6204 | return node; |
6205 | } |
6206 | case vshift8S_1_rule: { |
6207 | vshift8S_1Node *node = new vshift8S_1Node(); |
6208 | node->set_opnd_array(3, MachOperGenerator(VECX)); |
6209 | node->_bottom_type = _leaf->bottom_type(); |
6210 | return node; |
6211 | } |
6212 | case vshift16S_rule: { |
6213 | vshift16SNode *node = new vshift16SNode(); |
6214 | node->_bottom_type = _leaf->bottom_type(); |
6215 | return node; |
6216 | } |
6217 | case vshift16S_0_rule: { |
6218 | vshift16S_0Node *node = new vshift16S_0Node(); |
6219 | node->_bottom_type = _leaf->bottom_type(); |
6220 | return node; |
6221 | } |
6222 | case vshift16S_1_rule: { |
6223 | vshift16S_1Node *node = new vshift16S_1Node(); |
6224 | node->_bottom_type = _leaf->bottom_type(); |
6225 | return node; |
6226 | } |
6227 | case vshift32S_rule: { |
6228 | vshift32SNode *node = new vshift32SNode(); |
6229 | node->_bottom_type = _leaf->bottom_type(); |
6230 | return node; |
6231 | } |
6232 | case vshift32S_0_rule: { |
6233 | vshift32S_0Node *node = new vshift32S_0Node(); |
6234 | node->_bottom_type = _leaf->bottom_type(); |
6235 | return node; |
6236 | } |
6237 | case vshift32S_1_rule: { |
6238 | vshift32S_1Node *node = new vshift32S_1Node(); |
6239 | node->_bottom_type = _leaf->bottom_type(); |
6240 | return node; |
6241 | } |
6242 | case vshift2I_rule: { |
6243 | vshift2INode *node = new vshift2INode(); |
6244 | node->set_opnd_array(3, MachOperGenerator(VECD)); |
6245 | node->_bottom_type = _leaf->bottom_type(); |
6246 | return node; |
6247 | } |
6248 | case vshift2I_0_rule: { |
6249 | vshift2I_0Node *node = new vshift2I_0Node(); |
6250 | node->set_opnd_array(3, MachOperGenerator(VECD)); |
6251 | node->_bottom_type = _leaf->bottom_type(); |
6252 | return node; |
6253 | } |
6254 | case vshift2I_1_rule: { |
6255 | vshift2I_1Node *node = new vshift2I_1Node(); |
6256 | node->set_opnd_array(3, MachOperGenerator(VECD)); |
6257 | node->_bottom_type = _leaf->bottom_type(); |
6258 | return node; |
6259 | } |
6260 | case vshift4I_rule: { |
6261 | vshift4INode *node = new vshift4INode(); |
6262 | node->set_opnd_array(3, MachOperGenerator(VECX)); |
6263 | node->_bottom_type = _leaf->bottom_type(); |
6264 | return node; |
6265 | } |
6266 | case vshift4I_0_rule: { |
6267 | vshift4I_0Node *node = new vshift4I_0Node(); |
6268 | node->set_opnd_array(3, MachOperGenerator(VECX)); |
6269 | node->_bottom_type = _leaf->bottom_type(); |
6270 | return node; |
6271 | } |
6272 | case vshift4I_1_rule: { |
6273 | vshift4I_1Node *node = new vshift4I_1Node(); |
6274 | node->set_opnd_array(3, MachOperGenerator(VECX)); |
6275 | node->_bottom_type = _leaf->bottom_type(); |
6276 | return node; |
6277 | } |
6278 | case vshift8I_rule: { |
6279 | vshift8INode *node = new vshift8INode(); |
6280 | node->_bottom_type = _leaf->bottom_type(); |
6281 | return node; |
6282 | } |
6283 | case vshift8I_0_rule: { |
6284 | vshift8I_0Node *node = new vshift8I_0Node(); |
6285 | node->_bottom_type = _leaf->bottom_type(); |
6286 | return node; |
6287 | } |
6288 | case vshift8I_1_rule: { |
6289 | vshift8I_1Node *node = new vshift8I_1Node(); |
6290 | node->_bottom_type = _leaf->bottom_type(); |
6291 | return node; |
6292 | } |
6293 | case vshift16I_rule: { |
6294 | vshift16INode *node = new vshift16INode(); |
6295 | node->_bottom_type = _leaf->bottom_type(); |
6296 | return node; |
6297 | } |
6298 | case vshift16I_0_rule: { |
6299 | vshift16I_0Node *node = new vshift16I_0Node(); |
6300 | node->_bottom_type = _leaf->bottom_type(); |
6301 | return node; |
6302 | } |
6303 | case vshift16I_1_rule: { |
6304 | vshift16I_1Node *node = new vshift16I_1Node(); |
6305 | node->_bottom_type = _leaf->bottom_type(); |
6306 | return node; |
6307 | } |
6308 | case vshift2L_rule: { |
6309 | vshift2LNode *node = new vshift2LNode(); |
6310 | node->set_opnd_array(3, MachOperGenerator(VECX)); |
6311 | node->_bottom_type = _leaf->bottom_type(); |
6312 | return node; |
6313 | } |
6314 | case vshift2L_0_rule: { |
6315 | vshift2L_0Node *node = new vshift2L_0Node(); |
6316 | node->set_opnd_array(3, MachOperGenerator(VECX)); |
6317 | node->_bottom_type = _leaf->bottom_type(); |
6318 | return node; |
6319 | } |
6320 | case vshift4L_rule: { |
6321 | vshift4LNode *node = new vshift4LNode(); |
6322 | node->_bottom_type = _leaf->bottom_type(); |
6323 | return node; |
6324 | } |
6325 | case vshift4L_0_rule: { |
6326 | vshift4L_0Node *node = new vshift4L_0Node(); |
6327 | node->_bottom_type = _leaf->bottom_type(); |
6328 | return node; |
6329 | } |
6330 | case vshift8L_rule: { |
6331 | vshift8LNode *node = new vshift8LNode(); |
6332 | node->_bottom_type = _leaf->bottom_type(); |
6333 | return node; |
6334 | } |
6335 | case vshift8L_0_rule: { |
6336 | vshift8L_0Node *node = new vshift8L_0Node(); |
6337 | node->_bottom_type = _leaf->bottom_type(); |
6338 | return node; |
6339 | } |
6340 | case vshift8L_1_rule: { |
6341 | vshift8L_1Node *node = new vshift8L_1Node(); |
6342 | node->_bottom_type = _leaf->bottom_type(); |
6343 | return node; |
6344 | } |
6345 | case vsra2L_reg_rule: { |
6346 | vsra2L_regNode *node = new vsra2L_regNode(); |
6347 | node->set_opnd_array(3, MachOperGenerator(VECX)); |
6348 | node->set_opnd_array(4, MachOperGenerator(VECX)); |
6349 | node->set_opnd_array(5, MachOperGenerator(RREGI)); |
6350 | node->_bottom_type = _leaf->bottom_type(); |
6351 | return node; |
6352 | } |
6353 | case vsra2L_reg_evex_rule: { |
6354 | vsra2L_reg_evexNode *node = new vsra2L_reg_evexNode(); |
6355 | node->_bottom_type = _leaf->bottom_type(); |
6356 | return node; |
6357 | } |
6358 | case vsra4L_reg_rule: { |
6359 | vsra4L_regNode *node = new vsra4L_regNode(); |
6360 | node->set_opnd_array(3, MachOperGenerator(VECY)); |
6361 | node->set_opnd_array(4, MachOperGenerator(VECY)); |
6362 | node->set_opnd_array(5, MachOperGenerator(RREGI)); |
6363 | node->_bottom_type = _leaf->bottom_type(); |
6364 | return node; |
6365 | } |
6366 | case vsra4L_reg_evex_rule: { |
6367 | vsra4L_reg_evexNode *node = new vsra4L_reg_evexNode(); |
6368 | node->_bottom_type = _leaf->bottom_type(); |
6369 | return node; |
6370 | } |
6371 | case vand4B_rule: { |
6372 | vand4BNode *node = new vand4BNode(); |
6373 | node->_bottom_type = _leaf->bottom_type(); |
6374 | return node; |
6375 | } |
6376 | case vand4B_reg_rule: { |
6377 | vand4B_regNode *node = new vand4B_regNode(); |
6378 | node->_bottom_type = _leaf->bottom_type(); |
6379 | return node; |
6380 | } |
6381 | case vand4B_mem_rule: { |
6382 | vand4B_memNode *node = new vand4B_memNode(); |
6383 | node->_bottom_type = _leaf->bottom_type(); |
6384 | return node; |
6385 | } |
6386 | case vand4B_mem_0_rule: { |
6387 | vand4B_mem_0Node *node = new vand4B_mem_0Node(); |
6388 | node->_bottom_type = _leaf->bottom_type(); |
6389 | return node; |
6390 | } |
6391 | case vand8B_rule: { |
6392 | vand8BNode *node = new vand8BNode(); |
6393 | node->_bottom_type = _leaf->bottom_type(); |
6394 | return node; |
6395 | } |
6396 | case vand8B_reg_rule: { |
6397 | vand8B_regNode *node = new vand8B_regNode(); |
6398 | node->_bottom_type = _leaf->bottom_type(); |
6399 | return node; |
6400 | } |
6401 | case vand8B_mem_rule: { |
6402 | vand8B_memNode *node = new vand8B_memNode(); |
6403 | node->_bottom_type = _leaf->bottom_type(); |
6404 | return node; |
6405 | } |
6406 | case vand8B_mem_0_rule: { |
6407 | vand8B_mem_0Node *node = new vand8B_mem_0Node(); |
6408 | node->_bottom_type = _leaf->bottom_type(); |
6409 | return node; |
6410 | } |
6411 | case vand16B_rule: { |
6412 | vand16BNode *node = new vand16BNode(); |
6413 | node->_bottom_type = _leaf->bottom_type(); |
6414 | return node; |
6415 | } |
6416 | case vand16B_reg_rule: { |
6417 | vand16B_regNode *node = new vand16B_regNode(); |
6418 | node->_bottom_type = _leaf->bottom_type(); |
6419 | return node; |
6420 | } |
6421 | case vand16B_mem_rule: { |
6422 | vand16B_memNode *node = new vand16B_memNode(); |
6423 | node->_bottom_type = _leaf->bottom_type(); |
6424 | return node; |
6425 | } |
6426 | case vand16B_mem_0_rule: { |
6427 | vand16B_mem_0Node *node = new vand16B_mem_0Node(); |
6428 | node->_bottom_type = _leaf->bottom_type(); |
6429 | return node; |
6430 | } |
6431 | case vand32B_reg_rule: { |
6432 | vand32B_regNode *node = new vand32B_regNode(); |
6433 | node->_bottom_type = _leaf->bottom_type(); |
6434 | return node; |
6435 | } |
6436 | case vand32B_mem_rule: { |
6437 | vand32B_memNode *node = new vand32B_memNode(); |
6438 | node->_bottom_type = _leaf->bottom_type(); |
6439 | return node; |
6440 | } |
6441 | case vand32B_mem_0_rule: { |
6442 | vand32B_mem_0Node *node = new vand32B_mem_0Node(); |
6443 | node->_bottom_type = _leaf->bottom_type(); |
6444 | return node; |
6445 | } |
6446 | case vand64B_reg_rule: { |
6447 | vand64B_regNode *node = new vand64B_regNode(); |
6448 | node->_bottom_type = _leaf->bottom_type(); |
6449 | return node; |
6450 | } |
6451 | case vand64B_mem_rule: { |
6452 | vand64B_memNode *node = new vand64B_memNode(); |
6453 | node->_bottom_type = _leaf->bottom_type(); |
6454 | return node; |
6455 | } |
6456 | case vand64B_mem_0_rule: { |
6457 | vand64B_mem_0Node *node = new vand64B_mem_0Node(); |
6458 | node->_bottom_type = _leaf->bottom_type(); |
6459 | return node; |
6460 | } |
6461 | case vor4B_rule: { |
6462 | vor4BNode *node = new vor4BNode(); |
6463 | node->_bottom_type = _leaf->bottom_type(); |
6464 | return node; |
6465 | } |
6466 | case vor4B_reg_rule: { |
6467 | vor4B_regNode *node = new vor4B_regNode(); |
6468 | node->_bottom_type = _leaf->bottom_type(); |
6469 | return node; |
6470 | } |
6471 | case vor4B_mem_rule: { |
6472 | vor4B_memNode *node = new vor4B_memNode(); |
6473 | node->_bottom_type = _leaf->bottom_type(); |
6474 | return node; |
6475 | } |
6476 | case vor4B_mem_0_rule: { |
6477 | vor4B_mem_0Node *node = new vor4B_mem_0Node(); |
6478 | node->_bottom_type = _leaf->bottom_type(); |
6479 | return node; |
6480 | } |
6481 | case vor8B_rule: { |
6482 | vor8BNode *node = new vor8BNode(); |
6483 | node->_bottom_type = _leaf->bottom_type(); |
6484 | return node; |
6485 | } |
6486 | case vor8B_reg_rule: { |
6487 | vor8B_regNode *node = new vor8B_regNode(); |
6488 | node->_bottom_type = _leaf->bottom_type(); |
6489 | return node; |
6490 | } |
6491 | case vor8B_mem_rule: { |
6492 | vor8B_memNode *node = new vor8B_memNode(); |
6493 | node->_bottom_type = _leaf->bottom_type(); |
6494 | return node; |
6495 | } |
6496 | case vor8B_mem_0_rule: { |
6497 | vor8B_mem_0Node *node = new vor8B_mem_0Node(); |
6498 | node->_bottom_type = _leaf->bottom_type(); |
6499 | return node; |
6500 | } |
6501 | case vor16B_rule: { |
6502 | vor16BNode *node = new vor16BNode(); |
6503 | node->_bottom_type = _leaf->bottom_type(); |
6504 | return node; |
6505 | } |
6506 | case vor16B_reg_rule: { |
6507 | vor16B_regNode *node = new vor16B_regNode(); |
6508 | node->_bottom_type = _leaf->bottom_type(); |
6509 | return node; |
6510 | } |
6511 | case vor16B_mem_rule: { |
6512 | vor16B_memNode *node = new vor16B_memNode(); |
6513 | node->_bottom_type = _leaf->bottom_type(); |
6514 | return node; |
6515 | } |
6516 | case vor16B_mem_0_rule: { |
6517 | vor16B_mem_0Node *node = new vor16B_mem_0Node(); |
6518 | node->_bottom_type = _leaf->bottom_type(); |
6519 | return node; |
6520 | } |
6521 | case vor32B_reg_rule: { |
6522 | vor32B_regNode *node = new vor32B_regNode(); |
6523 | node->_bottom_type = _leaf->bottom_type(); |
6524 | return node; |
6525 | } |
6526 | case vor32B_mem_rule: { |
6527 | vor32B_memNode *node = new vor32B_memNode(); |
6528 | node->_bottom_type = _leaf->bottom_type(); |
6529 | return node; |
6530 | } |
6531 | case vor32B_mem_0_rule: { |
6532 | vor32B_mem_0Node *node = new vor32B_mem_0Node(); |
6533 | node->_bottom_type = _leaf->bottom_type(); |
6534 | return node; |
6535 | } |
6536 | case vor64B_reg_rule: { |
6537 | vor64B_regNode *node = new vor64B_regNode(); |
6538 | node->_bottom_type = _leaf->bottom_type(); |
6539 | return node; |
6540 | } |
6541 | case vor64B_mem_rule: { |
6542 | vor64B_memNode *node = new vor64B_memNode(); |
6543 | node->_bottom_type = _leaf->bottom_type(); |
6544 | return node; |
6545 | } |
6546 | case vor64B_mem_0_rule: { |
6547 | vor64B_mem_0Node *node = new vor64B_mem_0Node(); |
6548 | node->_bottom_type = _leaf->bottom_type(); |
6549 | return node; |
6550 | } |
6551 | case vxor4B_rule: { |
6552 | vxor4BNode *node = new vxor4BNode(); |
6553 | node->_bottom_type = _leaf->bottom_type(); |
6554 | return node; |
6555 | } |
6556 | case vxor4B_reg_rule: { |
6557 | vxor4B_regNode *node = new vxor4B_regNode(); |
6558 | node->_bottom_type = _leaf->bottom_type(); |
6559 | return node; |
6560 | } |
6561 | case vxor4B_mem_rule: { |
6562 | vxor4B_memNode *node = new vxor4B_memNode(); |
6563 | node->_bottom_type = _leaf->bottom_type(); |
6564 | return node; |
6565 | } |
6566 | case vxor4B_mem_0_rule: { |
6567 | vxor4B_mem_0Node *node = new vxor4B_mem_0Node(); |
6568 | node->_bottom_type = _leaf->bottom_type(); |
6569 | return node; |
6570 | } |
6571 | case vxor8B_rule: { |
6572 | vxor8BNode *node = new vxor8BNode(); |
6573 | node->_bottom_type = _leaf->bottom_type(); |
6574 | return node; |
6575 | } |
6576 | case vxor8B_reg_rule: { |
6577 | vxor8B_regNode *node = new vxor8B_regNode(); |
6578 | node->_bottom_type = _leaf->bottom_type(); |
6579 | return node; |
6580 | } |
6581 | case vxor8B_mem_rule: { |
6582 | vxor8B_memNode *node = new vxor8B_memNode(); |
6583 | node->_bottom_type = _leaf->bottom_type(); |
6584 | return node; |
6585 | } |
6586 | case vxor8B_mem_0_rule: { |
6587 | vxor8B_mem_0Node *node = new vxor8B_mem_0Node(); |
6588 | node->_bottom_type = _leaf->bottom_type(); |
6589 | return node; |
6590 | } |
6591 | case vxor16B_rule: { |
6592 | vxor16BNode *node = new vxor16BNode(); |
6593 | node->_bottom_type = _leaf->bottom_type(); |
6594 | return node; |
6595 | } |
6596 | case vxor16B_reg_rule: { |
6597 | vxor16B_regNode *node = new vxor16B_regNode(); |
6598 | node->_bottom_type = _leaf->bottom_type(); |
6599 | return node; |
6600 | } |
6601 | case vxor16B_mem_rule: { |
6602 | vxor16B_memNode *node = new vxor16B_memNode(); |
6603 | node->_bottom_type = _leaf->bottom_type(); |
6604 | return node; |
6605 | } |
6606 | case vxor16B_mem_0_rule: { |
6607 | vxor16B_mem_0Node *node = new vxor16B_mem_0Node(); |
6608 | node->_bottom_type = _leaf->bottom_type(); |
6609 | return node; |
6610 | } |
6611 | case vxor32B_reg_rule: { |
6612 | vxor32B_regNode *node = new vxor32B_regNode(); |
6613 | node->_bottom_type = _leaf->bottom_type(); |
6614 | return node; |
6615 | } |
6616 | case vxor32B_mem_rule: { |
6617 | vxor32B_memNode *node = new vxor32B_memNode(); |
6618 | node->_bottom_type = _leaf->bottom_type(); |
6619 | return node; |
6620 | } |
6621 | case vxor32B_mem_0_rule: { |
6622 | vxor32B_mem_0Node *node = new vxor32B_mem_0Node(); |
6623 | node->_bottom_type = _leaf->bottom_type(); |
6624 | return node; |
6625 | } |
6626 | case vxor64B_reg_rule: { |
6627 | vxor64B_regNode *node = new vxor64B_regNode(); |
6628 | node->_bottom_type = _leaf->bottom_type(); |
6629 | return node; |
6630 | } |
6631 | case vxor64B_mem_rule: { |
6632 | vxor64B_memNode *node = new vxor64B_memNode(); |
6633 | node->_bottom_type = _leaf->bottom_type(); |
6634 | return node; |
6635 | } |
6636 | case vxor64B_mem_0_rule: { |
6637 | vxor64B_mem_0Node *node = new vxor64B_mem_0Node(); |
6638 | node->_bottom_type = _leaf->bottom_type(); |
6639 | return node; |
6640 | } |
6641 | case vabs4B_reg_rule: { |
6642 | vabs4B_regNode *node = new vabs4B_regNode(); |
6643 | node->_bottom_type = _leaf->bottom_type(); |
6644 | return node; |
6645 | } |
6646 | case vabs8B_reg_rule: { |
6647 | vabs8B_regNode *node = new vabs8B_regNode(); |
6648 | node->_bottom_type = _leaf->bottom_type(); |
6649 | return node; |
6650 | } |
6651 | case vabs16B_reg_rule: { |
6652 | vabs16B_regNode *node = new vabs16B_regNode(); |
6653 | node->_bottom_type = _leaf->bottom_type(); |
6654 | return node; |
6655 | } |
6656 | case vabs32B_reg_rule: { |
6657 | vabs32B_regNode *node = new vabs32B_regNode(); |
6658 | node->_bottom_type = _leaf->bottom_type(); |
6659 | return node; |
6660 | } |
6661 | case vabs64B_reg_rule: { |
6662 | vabs64B_regNode *node = new vabs64B_regNode(); |
6663 | node->_bottom_type = _leaf->bottom_type(); |
6664 | return node; |
6665 | } |
6666 | case vabs2S_reg_rule: { |
6667 | vabs2S_regNode *node = new vabs2S_regNode(); |
6668 | node->_bottom_type = _leaf->bottom_type(); |
6669 | return node; |
6670 | } |
6671 | case vabs4S_reg_rule: { |
6672 | vabs4S_regNode *node = new vabs4S_regNode(); |
6673 | node->_bottom_type = _leaf->bottom_type(); |
6674 | return node; |
6675 | } |
6676 | case vabs8S_reg_rule: { |
6677 | vabs8S_regNode *node = new vabs8S_regNode(); |
6678 | node->_bottom_type = _leaf->bottom_type(); |
6679 | return node; |
6680 | } |
6681 | case vabs16S_reg_rule: { |
6682 | vabs16S_regNode *node = new vabs16S_regNode(); |
6683 | node->_bottom_type = _leaf->bottom_type(); |
6684 | return node; |
6685 | } |
6686 | case vabs32S_reg_rule: { |
6687 | vabs32S_regNode *node = new vabs32S_regNode(); |
6688 | node->_bottom_type = _leaf->bottom_type(); |
6689 | return node; |
6690 | } |
6691 | case vabs2I_reg_rule: { |
6692 | vabs2I_regNode *node = new vabs2I_regNode(); |
6693 | node->_bottom_type = _leaf->bottom_type(); |
6694 | return node; |
6695 | } |
6696 | case vabs4I_reg_rule: { |
6697 | vabs4I_regNode *node = new vabs4I_regNode(); |
6698 | node->_bottom_type = _leaf->bottom_type(); |
6699 | return node; |
6700 | } |
6701 | case vabs8I_reg_rule: { |
6702 | vabs8I_regNode *node = new vabs8I_regNode(); |
6703 | node->_bottom_type = _leaf->bottom_type(); |
6704 | return node; |
6705 | } |
6706 | case vabs16I_reg_rule: { |
6707 | vabs16I_regNode *node = new vabs16I_regNode(); |
6708 | node->_bottom_type = _leaf->bottom_type(); |
6709 | return node; |
6710 | } |
6711 | case vabs2L_reg_rule: { |
6712 | vabs2L_regNode *node = new vabs2L_regNode(); |
6713 | node->_bottom_type = _leaf->bottom_type(); |
6714 | return node; |
6715 | } |
6716 | case vabs4L_reg_rule: { |
6717 | vabs4L_regNode *node = new vabs4L_regNode(); |
6718 | node->_bottom_type = _leaf->bottom_type(); |
6719 | return node; |
6720 | } |
6721 | case vabs8L_reg_rule: { |
6722 | vabs8L_regNode *node = new vabs8L_regNode(); |
6723 | node->_bottom_type = _leaf->bottom_type(); |
6724 | return node; |
6725 | } |
6726 | case vabsneg2D_rule: { |
6727 | vabsneg2DNode *node = new vabsneg2DNode(); |
6728 | node->set_opnd_array(2, MachOperGenerator(RREGI)); |
6729 | node->_bottom_type = _leaf->bottom_type(); |
6730 | return node; |
6731 | } |
6732 | case vabsneg2D_0_rule: { |
6733 | vabsneg2D_0Node *node = new vabsneg2D_0Node(); |
6734 | node->set_opnd_array(2, MachOperGenerator(RREGI)); |
6735 | node->_bottom_type = _leaf->bottom_type(); |
6736 | return node; |
6737 | } |
6738 | case vabsneg4D_rule: { |
6739 | vabsneg4DNode *node = new vabsneg4DNode(); |
6740 | node->set_opnd_array(2, MachOperGenerator(RREGI)); |
6741 | node->_bottom_type = _leaf->bottom_type(); |
6742 | return node; |
6743 | } |
6744 | case vabsneg4D_0_rule: { |
6745 | vabsneg4D_0Node *node = new vabsneg4D_0Node(); |
6746 | node->set_opnd_array(2, MachOperGenerator(RREGI)); |
6747 | node->_bottom_type = _leaf->bottom_type(); |
6748 | return node; |
6749 | } |
6750 | case vabsneg8D_rule: { |
6751 | vabsneg8DNode *node = new vabsneg8DNode(); |
6752 | node->set_opnd_array(2, MachOperGenerator(RREGI)); |
6753 | node->_bottom_type = _leaf->bottom_type(); |
6754 | return node; |
6755 | } |
6756 | case vabsneg8D_0_rule: { |
6757 | vabsneg8D_0Node *node = new vabsneg8D_0Node(); |
6758 | node->set_opnd_array(2, MachOperGenerator(RREGI)); |
6759 | node->_bottom_type = _leaf->bottom_type(); |
6760 | return node; |
6761 | } |
6762 | case vabsneg2F_rule: { |
6763 | vabsneg2FNode *node = new vabsneg2FNode(); |
6764 | node->set_opnd_array(2, MachOperGenerator(RREGI)); |
6765 | node->_bottom_type = _leaf->bottom_type(); |
6766 | return node; |
6767 | } |
6768 | case vabsneg2F_0_rule: { |
6769 | vabsneg2F_0Node *node = new vabsneg2F_0Node(); |
6770 | node->set_opnd_array(2, MachOperGenerator(RREGI)); |
6771 | node->_bottom_type = _leaf->bottom_type(); |
6772 | return node; |
6773 | } |
6774 | case vabsneg4F_rule: { |
6775 | vabsneg4FNode *node = new vabsneg4FNode(); |
6776 | node->set_opnd_array(2, MachOperGenerator(RREGI)); |
6777 | node->_bottom_type = _leaf->bottom_type(); |
6778 | return node; |
6779 | } |
6780 | case vabsneg4F_0_rule: { |
6781 | vabsneg4F_0Node *node = new vabsneg4F_0Node(); |
6782 | node->set_opnd_array(2, MachOperGenerator(RREGI)); |
6783 | node->_bottom_type = _leaf->bottom_type(); |
6784 | return node; |
6785 | } |
6786 | case vabsneg8F_rule: { |
6787 | vabsneg8FNode *node = new vabsneg8FNode(); |
6788 | node->set_opnd_array(2, MachOperGenerator(RREGI)); |
6789 | node->_bottom_type = _leaf->bottom_type(); |
6790 | return node; |
6791 | } |
6792 | case vabsneg8F_0_rule: { |
6793 | vabsneg8F_0Node *node = new vabsneg8F_0Node(); |
6794 | node->set_opnd_array(2, MachOperGenerator(RREGI)); |
6795 | node->_bottom_type = _leaf->bottom_type(); |
6796 | return node; |
6797 | } |
6798 | case vabsneg16F_rule: { |
6799 | vabsneg16FNode *node = new vabsneg16FNode(); |
6800 | node->set_opnd_array(2, MachOperGenerator(RREGI)); |
6801 | node->_bottom_type = _leaf->bottom_type(); |
6802 | return node; |
6803 | } |
6804 | case vabsneg16F_0_rule: { |
6805 | vabsneg16F_0Node *node = new vabsneg16F_0Node(); |
6806 | node->set_opnd_array(2, MachOperGenerator(RREGI)); |
6807 | node->_bottom_type = _leaf->bottom_type(); |
6808 | return node; |
6809 | } |
6810 | case vfma2D_reg_rule: { |
6811 | vfma2D_regNode *node = new vfma2D_regNode(); |
6812 | node->_bottom_type = _leaf->bottom_type(); |
6813 | return node; |
6814 | } |
6815 | case vfma2D_mem_rule: { |
6816 | vfma2D_memNode *node = new vfma2D_memNode(); |
6817 | node->_bottom_type = _leaf->bottom_type(); |
6818 | return node; |
6819 | } |
6820 | case vfma4D_reg_rule: { |
6821 | vfma4D_regNode *node = new vfma4D_regNode(); |
6822 | node->_bottom_type = _leaf->bottom_type(); |
6823 | return node; |
6824 | } |
6825 | case vfma4D_mem_rule: { |
6826 | vfma4D_memNode *node = new vfma4D_memNode(); |
6827 | node->_bottom_type = _leaf->bottom_type(); |
6828 | return node; |
6829 | } |
6830 | case vfma8D_reg_rule: { |
6831 | vfma8D_regNode *node = new vfma8D_regNode(); |
6832 | node->_bottom_type = _leaf->bottom_type(); |
6833 | return node; |
6834 | } |
6835 | case vfma8D_mem_rule: { |
6836 | vfma8D_memNode *node = new vfma8D_memNode(); |
6837 | node->_bottom_type = _leaf->bottom_type(); |
6838 | return node; |
6839 | } |
6840 | case vfma4F_reg_rule: { |
6841 | vfma4F_regNode *node = new vfma4F_regNode(); |
6842 | node->_bottom_type = _leaf->bottom_type(); |
6843 | return node; |
6844 | } |
6845 | case vfma4F_mem_rule: { |
6846 | vfma4F_memNode *node = new vfma4F_memNode(); |
6847 | node->_bottom_type = _leaf->bottom_type(); |
6848 | return node; |
6849 | } |
6850 | case vfma8F_reg_rule: { |
6851 | vfma8F_regNode *node = new vfma8F_regNode(); |
6852 | node->_bottom_type = _leaf->bottom_type(); |
6853 | return node; |
6854 | } |
6855 | case vfma8F_mem_rule: { |
6856 | vfma8F_memNode *node = new vfma8F_memNode(); |
6857 | node->_bottom_type = _leaf->bottom_type(); |
6858 | return node; |
6859 | } |
6860 | case vfma16F_reg_rule: { |
6861 | vfma16F_regNode *node = new vfma16F_regNode(); |
6862 | node->_bottom_type = _leaf->bottom_type(); |
6863 | return node; |
6864 | } |
6865 | case vfma16F_mem_rule: { |
6866 | vfma16F_memNode *node = new vfma16F_memNode(); |
6867 | node->_bottom_type = _leaf->bottom_type(); |
6868 | return node; |
6869 | } |
6870 | case smuladd4S2I_reg_rule: { |
6871 | smuladd4S2I_regNode *node = new smuladd4S2I_regNode(); |
6872 | node->_bottom_type = _leaf->bottom_type(); |
6873 | return node; |
6874 | } |
6875 | case vmuladd4S2I_reg_rule: { |
6876 | vmuladd4S2I_regNode *node = new vmuladd4S2I_regNode(); |
6877 | node->_bottom_type = _leaf->bottom_type(); |
6878 | return node; |
6879 | } |
6880 | case smuladd8S4I_reg_rule: { |
6881 | smuladd8S4I_regNode *node = new smuladd8S4I_regNode(); |
6882 | node->_bottom_type = _leaf->bottom_type(); |
6883 | return node; |
6884 | } |
6885 | case vmuladd8S4I_reg_rule: { |
6886 | vmuladd8S4I_regNode *node = new vmuladd8S4I_regNode(); |
6887 | node->_bottom_type = _leaf->bottom_type(); |
6888 | return node; |
6889 | } |
6890 | case vmuladd16S8I_reg_rule: { |
6891 | vmuladd16S8I_regNode *node = new vmuladd16S8I_regNode(); |
6892 | node->_bottom_type = _leaf->bottom_type(); |
6893 | return node; |
6894 | } |
6895 | case vmuladd32S16I_reg_rule: { |
6896 | vmuladd32S16I_regNode *node = new vmuladd32S16I_regNode(); |
6897 | node->_bottom_type = _leaf->bottom_type(); |
6898 | return node; |
6899 | } |
6900 | case vmuladdadd4S2I_reg_rule: { |
6901 | vmuladdadd4S2I_regNode *node = new vmuladdadd4S2I_regNode(); |
6902 | node->_bottom_type = _leaf->bottom_type(); |
6903 | return node; |
6904 | } |
6905 | case vmuladdadd4S2I_reg_0_rule: { |
6906 | vmuladdadd4S2I_reg_0Node *node = new vmuladdadd4S2I_reg_0Node(); |
6907 | node->_bottom_type = _leaf->bottom_type(); |
6908 | return node; |
6909 | } |
6910 | case vmuladdadd8S4I_reg_rule: { |
6911 | vmuladdadd8S4I_regNode *node = new vmuladdadd8S4I_regNode(); |
6912 | node->_bottom_type = _leaf->bottom_type(); |
6913 | return node; |
6914 | } |
6915 | case vmuladdadd8S4I_reg_0_rule: { |
6916 | vmuladdadd8S4I_reg_0Node *node = new vmuladdadd8S4I_reg_0Node(); |
6917 | node->_bottom_type = _leaf->bottom_type(); |
6918 | return node; |
6919 | } |
6920 | case vmuladdadd16S8I_reg_rule: { |
6921 | vmuladdadd16S8I_regNode *node = new vmuladdadd16S8I_regNode(); |
6922 | node->_bottom_type = _leaf->bottom_type(); |
6923 | return node; |
6924 | } |
6925 | case vmuladdadd16S8I_reg_0_rule: { |
6926 | vmuladdadd16S8I_reg_0Node *node = new vmuladdadd16S8I_reg_0Node(); |
6927 | node->_bottom_type = _leaf->bottom_type(); |
6928 | return node; |
6929 | } |
6930 | case vmuladdadd32S16I_reg_rule: { |
6931 | vmuladdadd32S16I_regNode *node = new vmuladdadd32S16I_regNode(); |
6932 | node->_bottom_type = _leaf->bottom_type(); |
6933 | return node; |
6934 | } |
6935 | case vmuladdadd32S16I_reg_0_rule: { |
6936 | vmuladdadd32S16I_reg_0Node *node = new vmuladdadd32S16I_reg_0Node(); |
6937 | node->_bottom_type = _leaf->bottom_type(); |
6938 | return node; |
6939 | } |
6940 | case vpopcount2I_rule: { |
6941 | vpopcount2INode *node = new vpopcount2INode(); |
6942 | node->_bottom_type = _leaf->bottom_type(); |
6943 | return node; |
6944 | } |
6945 | case vpopcount4I_rule: { |
6946 | vpopcount4INode *node = new vpopcount4INode(); |
6947 | node->_bottom_type = _leaf->bottom_type(); |
6948 | return node; |
6949 | } |
6950 | case vpopcount8I_rule: { |
6951 | vpopcount8INode *node = new vpopcount8INode(); |
6952 | node->_bottom_type = _leaf->bottom_type(); |
6953 | return node; |
6954 | } |
6955 | case vpopcount16I_rule: { |
6956 | vpopcount16INode *node = new vpopcount16INode(); |
6957 | node->_bottom_type = _leaf->bottom_type(); |
6958 | return node; |
6959 | } |
6960 | case compareAndSwapP_shenandoah_rule: { |
6961 | compareAndSwapP_shenandoahNode *node = new compareAndSwapP_shenandoahNode(); |
6962 | node->set_opnd_array(4, MachOperGenerator(RREGP)); |
6963 | node->set_opnd_array(5, MachOperGenerator(RREGP)); |
6964 | return node; |
6965 | } |
6966 | case compareAndSwapP_shenandoah_0_rule: { |
6967 | compareAndSwapP_shenandoah_0Node *node = new compareAndSwapP_shenandoah_0Node(); |
6968 | node->set_opnd_array(4, MachOperGenerator(RREGP)); |
6969 | node->set_opnd_array(5, MachOperGenerator(RREGP)); |
6970 | return node; |
6971 | } |
6972 | case compareAndSwapN_shenandoah_rule: { |
6973 | compareAndSwapN_shenandoahNode *node = new compareAndSwapN_shenandoahNode(); |
6974 | node->set_opnd_array(4, MachOperGenerator(RREGP)); |
6975 | node->set_opnd_array(5, MachOperGenerator(RREGP)); |
6976 | return node; |
6977 | } |
6978 | case compareAndSwapN_shenandoah_0_rule: { |
6979 | compareAndSwapN_shenandoah_0Node *node = new compareAndSwapN_shenandoah_0Node(); |
6980 | node->set_opnd_array(4, MachOperGenerator(RREGP)); |
6981 | node->set_opnd_array(5, MachOperGenerator(RREGP)); |
6982 | return node; |
6983 | } |
6984 | case compareAndExchangeN_shenandoah_rule: { |
6985 | compareAndExchangeN_shenandoahNode *node = new compareAndExchangeN_shenandoahNode(); |
6986 | node->set_opnd_array(4, MachOperGenerator(RREGP)); |
6987 | node->set_opnd_array(5, MachOperGenerator(RREGP)); |
6988 | node->_bottom_type = _leaf->bottom_type(); |
6989 | return node; |
6990 | } |
6991 | case compareAndExchangeP_shenandoah_rule: { |
6992 | compareAndExchangeP_shenandoahNode *node = new compareAndExchangeP_shenandoahNode(); |
6993 | node->set_opnd_array(4, MachOperGenerator(RREGP)); |
6994 | node->set_opnd_array(5, MachOperGenerator(RREGP)); |
6995 | node->_bottom_type = _leaf->bottom_type(); |
6996 | return node; |
6997 | } |
6998 | case zLoadBarrierSlowRegXmmAndYmm_rule: { |
6999 | zLoadBarrierSlowRegXmmAndYmmNode *node = new zLoadBarrierSlowRegXmmAndYmmNode(); |
7000 | node->_bottom_type = _leaf->bottom_type(); |
7001 | return node; |
7002 | } |
7003 | case zLoadBarrierSlowRegZmm_rule: { |
7004 | zLoadBarrierSlowRegZmmNode *node = new zLoadBarrierSlowRegZmmNode(); |
7005 | node->_bottom_type = _leaf->bottom_type(); |
7006 | return node; |
7007 | } |
7008 | case zLoadBarrierWeakSlowRegXmmAndYmm_rule: { |
7009 | zLoadBarrierWeakSlowRegXmmAndYmmNode *node = new zLoadBarrierWeakSlowRegXmmAndYmmNode(); |
7010 | node->_bottom_type = _leaf->bottom_type(); |
7011 | return node; |
7012 | } |
7013 | case zLoadBarrierWeakSlowRegZmm_rule: { |
7014 | zLoadBarrierWeakSlowRegZmmNode *node = new zLoadBarrierWeakSlowRegZmmNode(); |
7015 | node->_bottom_type = _leaf->bottom_type(); |
7016 | return node; |
7017 | } |
7018 | case z_compareAndExchangeP_rule: { |
7019 | z_compareAndExchangePNode *node = new z_compareAndExchangePNode(); |
7020 | node->_bottom_type = _leaf->bottom_type(); |
7021 | return node; |
7022 | } |
7023 | case z_compareAndSwapP_rule: { |
7024 | z_compareAndSwapPNode *node = new z_compareAndSwapPNode(); |
7025 | return node; |
7026 | } |
7027 | case z_compareAndSwapP_0_rule: { |
7028 | z_compareAndSwapP_0Node *node = new z_compareAndSwapP_0Node(); |
7029 | return node; |
7030 | } |
7031 | case z_xchgP_rule: { |
7032 | z_xchgPNode *node = new z_xchgPNode(); |
7033 | node->_bottom_type = _leaf->bottom_type(); |
7034 | return node; |
7035 | } |
7036 | |
7037 | default: |
7038 | fprintf(stderr, "Default MachNode Generator invoked for: \n" ); |
7039 | fprintf(stderr, " opcode = %d\n" , opcode); |
7040 | break; |
7041 | }; |
7042 | return NULL; |
7043 | } |
7044 | // Check consistency of C++ compilation with ADLC options: |
7045 | // Check adlc -DLINUX=1 |
7046 | #ifndef LINUX |
7047 | # error "LINUX must be defined" |
7048 | #endif // LINUX |
7049 | // Check adlc -D_GNU_SOURCE=1 |
7050 | #ifndef _GNU_SOURCE |
7051 | # error "_GNU_SOURCE must be defined" |
7052 | #endif // _GNU_SOURCE |
7053 | // Check adlc -DAMD64=1 |
7054 | #ifndef AMD64 |
7055 | # error "AMD64 must be defined" |
7056 | #endif // AMD64 |
7057 | // Check adlc -D_LP64=1 |
7058 | #ifndef _LP64 |
7059 | # error "_LP64 must be defined" |
7060 | #endif // _LP64 |
7061 | |