1 | /* |
2 | * QEMU PowerPC pSeries Logical Partition (aka sPAPR) hardware System Emulator |
3 | * |
4 | * RTAS events handling |
5 | * |
6 | * Copyright (c) 2012 David Gibson, IBM Corporation. |
7 | * |
8 | * Permission is hereby granted, free of charge, to any person obtaining a copy |
9 | * of this software and associated documentation files (the "Software"), to deal |
10 | * in the Software without restriction, including without limitation the rights |
11 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell |
12 | * copies of the Software, and to permit persons to whom the Software is |
13 | * furnished to do so, subject to the following conditions: |
14 | * |
15 | * The above copyright notice and this permission notice shall be included in |
16 | * all copies or substantial portions of the Software. |
17 | * |
18 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
19 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
20 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
21 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
22 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, |
23 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN |
24 | * THE SOFTWARE. |
25 | * |
26 | */ |
27 | |
28 | #include "qemu/osdep.h" |
29 | #include "qapi/error.h" |
30 | #include "cpu.h" |
31 | #include "sysemu/device_tree.h" |
32 | #include "sysemu/runstate.h" |
33 | |
34 | #include "hw/ppc/fdt.h" |
35 | #include "hw/ppc/spapr.h" |
36 | #include "hw/ppc/spapr_vio.h" |
37 | #include "hw/pci/pci.h" |
38 | #include "hw/irq.h" |
39 | #include "hw/pci-host/spapr.h" |
40 | #include "hw/ppc/spapr_drc.h" |
41 | #include "qemu/help_option.h" |
42 | #include "qemu/bcd.h" |
43 | #include "hw/ppc/spapr_ovec.h" |
44 | #include <libfdt.h> |
45 | |
46 | #define RTAS_LOG_VERSION_MASK 0xff000000 |
47 | #define RTAS_LOG_VERSION_6 0x06000000 |
48 | #define RTAS_LOG_SEVERITY_MASK 0x00e00000 |
49 | #define RTAS_LOG_SEVERITY_ALREADY_REPORTED 0x00c00000 |
50 | #define RTAS_LOG_SEVERITY_FATAL 0x00a00000 |
51 | #define RTAS_LOG_SEVERITY_ERROR 0x00800000 |
52 | #define RTAS_LOG_SEVERITY_ERROR_SYNC 0x00600000 |
53 | #define RTAS_LOG_SEVERITY_WARNING 0x00400000 |
54 | #define RTAS_LOG_SEVERITY_EVENT 0x00200000 |
55 | #define RTAS_LOG_SEVERITY_NO_ERROR 0x00000000 |
56 | #define RTAS_LOG_DISPOSITION_MASK 0x00180000 |
57 | #define RTAS_LOG_DISPOSITION_FULLY_RECOVERED 0x00000000 |
58 | #define RTAS_LOG_DISPOSITION_LIMITED_RECOVERY 0x00080000 |
59 | #define RTAS_LOG_DISPOSITION_NOT_RECOVERED 0x00100000 |
60 | #define RTAS_LOG_OPTIONAL_PART_PRESENT 0x00040000 |
61 | #define RTAS_LOG_INITIATOR_MASK 0x0000f000 |
62 | #define RTAS_LOG_INITIATOR_UNKNOWN 0x00000000 |
63 | #define RTAS_LOG_INITIATOR_CPU 0x00001000 |
64 | #define RTAS_LOG_INITIATOR_PCI 0x00002000 |
65 | #define RTAS_LOG_INITIATOR_MEMORY 0x00004000 |
66 | #define RTAS_LOG_INITIATOR_HOTPLUG 0x00006000 |
67 | #define RTAS_LOG_TARGET_MASK 0x00000f00 |
68 | #define RTAS_LOG_TARGET_UNKNOWN 0x00000000 |
69 | #define RTAS_LOG_TARGET_CPU 0x00000100 |
70 | #define RTAS_LOG_TARGET_PCI 0x00000200 |
71 | #define RTAS_LOG_TARGET_MEMORY 0x00000400 |
72 | #define RTAS_LOG_TARGET_HOTPLUG 0x00000600 |
73 | #define RTAS_LOG_TYPE_MASK 0x000000ff |
74 | #define RTAS_LOG_TYPE_OTHER 0x00000000 |
75 | #define RTAS_LOG_TYPE_RETRY 0x00000001 |
76 | #define RTAS_LOG_TYPE_TCE_ERR 0x00000002 |
77 | #define RTAS_LOG_TYPE_INTERN_DEV_FAIL 0x00000003 |
78 | #define RTAS_LOG_TYPE_TIMEOUT 0x00000004 |
79 | #define RTAS_LOG_TYPE_DATA_PARITY 0x00000005 |
80 | #define RTAS_LOG_TYPE_ADDR_PARITY 0x00000006 |
81 | #define RTAS_LOG_TYPE_CACHE_PARITY 0x00000007 |
82 | #define RTAS_LOG_TYPE_ADDR_INVALID 0x00000008 |
83 | #define RTAS_LOG_TYPE_ECC_UNCORR 0x00000009 |
84 | #define RTAS_LOG_TYPE_ECC_CORR 0x0000000a |
85 | #define RTAS_LOG_TYPE_EPOW 0x00000040 |
86 | #define RTAS_LOG_TYPE_HOTPLUG 0x000000e5 |
87 | |
88 | struct rtas_error_log { |
89 | uint32_t summary; |
90 | uint32_t extended_length; |
91 | } QEMU_PACKED; |
92 | |
93 | struct rtas_event_log_v6 { |
94 | uint8_t b0; |
95 | #define RTAS_LOG_V6_B0_VALID 0x80 |
96 | #define RTAS_LOG_V6_B0_UNRECOVERABLE_ERROR 0x40 |
97 | #define RTAS_LOG_V6_B0_RECOVERABLE_ERROR 0x20 |
98 | #define RTAS_LOG_V6_B0_DEGRADED_OPERATION 0x10 |
99 | #define RTAS_LOG_V6_B0_PREDICTIVE_ERROR 0x08 |
100 | #define RTAS_LOG_V6_B0_NEW_LOG 0x04 |
101 | #define RTAS_LOG_V6_B0_BIGENDIAN 0x02 |
102 | uint8_t _resv1; |
103 | uint8_t b2; |
104 | #define RTAS_LOG_V6_B2_POWERPC_FORMAT 0x80 |
105 | #define RTAS_LOG_V6_B2_LOG_FORMAT_MASK 0x0f |
106 | #define RTAS_LOG_V6_B2_LOG_FORMAT_PLATFORM_EVENT 0x0e |
107 | uint8_t _resv2[9]; |
108 | uint32_t company; |
109 | #define RTAS_LOG_V6_COMPANY_IBM 0x49424d00 /* IBM<null> */ |
110 | } QEMU_PACKED; |
111 | |
112 | struct { |
113 | uint16_t ; |
114 | uint16_t ; |
115 | uint8_t ; |
116 | uint8_t ; |
117 | uint16_t ; |
118 | } QEMU_PACKED; |
119 | |
120 | struct rtas_event_log_v6_maina { |
121 | #define RTAS_LOG_V6_SECTION_ID_MAINA 0x5048 /* PH */ |
122 | struct rtas_event_log_v6_section_header hdr; |
123 | uint32_t creation_date; /* BCD: YYYYMMDD */ |
124 | uint32_t creation_time; /* BCD: HHMMSS00 */ |
125 | uint8_t _platform1[8]; |
126 | char creator_id; |
127 | uint8_t _resv1[2]; |
128 | uint8_t section_count; |
129 | uint8_t _resv2[4]; |
130 | uint8_t _platform2[8]; |
131 | uint32_t plid; |
132 | uint8_t _platform3[4]; |
133 | } QEMU_PACKED; |
134 | |
135 | struct rtas_event_log_v6_mainb { |
136 | #define RTAS_LOG_V6_SECTION_ID_MAINB 0x5548 /* UH */ |
137 | struct rtas_event_log_v6_section_header hdr; |
138 | uint8_t subsystem_id; |
139 | uint8_t _platform1; |
140 | uint8_t event_severity; |
141 | uint8_t event_subtype; |
142 | uint8_t _platform2[4]; |
143 | uint8_t _resv1[2]; |
144 | uint16_t action_flags; |
145 | uint8_t _resv2[4]; |
146 | } QEMU_PACKED; |
147 | |
148 | struct rtas_event_log_v6_epow { |
149 | #define RTAS_LOG_V6_SECTION_ID_EPOW 0x4550 /* EP */ |
150 | struct rtas_event_log_v6_section_header hdr; |
151 | uint8_t sensor_value; |
152 | #define RTAS_LOG_V6_EPOW_ACTION_RESET 0 |
153 | #define RTAS_LOG_V6_EPOW_ACTION_WARN_COOLING 1 |
154 | #define RTAS_LOG_V6_EPOW_ACTION_WARN_POWER 2 |
155 | #define RTAS_LOG_V6_EPOW_ACTION_SYSTEM_SHUTDOWN 3 |
156 | #define RTAS_LOG_V6_EPOW_ACTION_SYSTEM_HALT 4 |
157 | #define RTAS_LOG_V6_EPOW_ACTION_MAIN_ENCLOSURE 5 |
158 | #define RTAS_LOG_V6_EPOW_ACTION_POWER_OFF 7 |
159 | uint8_t event_modifier; |
160 | #define RTAS_LOG_V6_EPOW_MODIFIER_NORMAL 1 |
161 | #define RTAS_LOG_V6_EPOW_MODIFIER_ON_UPS 2 |
162 | #define RTAS_LOG_V6_EPOW_MODIFIER_CRITICAL 3 |
163 | #define RTAS_LOG_V6_EPOW_MODIFIER_TEMPERATURE 4 |
164 | uint8_t extended_modifier; |
165 | #define RTAS_LOG_V6_EPOW_XMODIFIER_SYSTEM_WIDE 0 |
166 | #define RTAS_LOG_V6_EPOW_XMODIFIER_PARTITION_SPECIFIC 1 |
167 | uint8_t _resv; |
168 | uint64_t reason_code; |
169 | } QEMU_PACKED; |
170 | |
171 | struct epow_extended_log { |
172 | struct rtas_event_log_v6 v6hdr; |
173 | struct rtas_event_log_v6_maina maina; |
174 | struct rtas_event_log_v6_mainb mainb; |
175 | struct rtas_event_log_v6_epow epow; |
176 | } QEMU_PACKED; |
177 | |
178 | union drc_identifier { |
179 | uint32_t index; |
180 | uint32_t count; |
181 | struct { |
182 | uint32_t count; |
183 | uint32_t index; |
184 | } count_indexed; |
185 | char name[1]; |
186 | } QEMU_PACKED; |
187 | |
188 | struct rtas_event_log_v6_hp { |
189 | #define RTAS_LOG_V6_SECTION_ID_HOTPLUG 0x4850 /* HP */ |
190 | struct rtas_event_log_v6_section_header hdr; |
191 | uint8_t hotplug_type; |
192 | #define RTAS_LOG_V6_HP_TYPE_CPU 1 |
193 | #define RTAS_LOG_V6_HP_TYPE_MEMORY 2 |
194 | #define RTAS_LOG_V6_HP_TYPE_SLOT 3 |
195 | #define RTAS_LOG_V6_HP_TYPE_PHB 4 |
196 | #define RTAS_LOG_V6_HP_TYPE_PCI 5 |
197 | uint8_t hotplug_action; |
198 | #define RTAS_LOG_V6_HP_ACTION_ADD 1 |
199 | #define RTAS_LOG_V6_HP_ACTION_REMOVE 2 |
200 | uint8_t hotplug_identifier; |
201 | #define RTAS_LOG_V6_HP_ID_DRC_NAME 1 |
202 | #define RTAS_LOG_V6_HP_ID_DRC_INDEX 2 |
203 | #define RTAS_LOG_V6_HP_ID_DRC_COUNT 3 |
204 | #define RTAS_LOG_V6_HP_ID_DRC_COUNT_INDEXED 4 |
205 | uint8_t reserved; |
206 | union drc_identifier drc_id; |
207 | } QEMU_PACKED; |
208 | |
209 | struct hp_extended_log { |
210 | struct rtas_event_log_v6 v6hdr; |
211 | struct rtas_event_log_v6_maina maina; |
212 | struct rtas_event_log_v6_mainb mainb; |
213 | struct rtas_event_log_v6_hp hp; |
214 | } QEMU_PACKED; |
215 | |
216 | typedef enum EventClass { |
217 | EVENT_CLASS_INTERNAL_ERRORS = 0, |
218 | EVENT_CLASS_EPOW = 1, |
219 | EVENT_CLASS_RESERVED = 2, |
220 | EVENT_CLASS_HOT_PLUG = 3, |
221 | EVENT_CLASS_IO = 4, |
222 | EVENT_CLASS_MAX |
223 | } EventClassIndex; |
224 | #define EVENT_CLASS_MASK(index) (1 << (31 - index)) |
225 | |
226 | static const char * const event_names[EVENT_CLASS_MAX] = { |
227 | [EVENT_CLASS_INTERNAL_ERRORS] = "internal-errors" , |
228 | [EVENT_CLASS_EPOW] = "epow-events" , |
229 | [EVENT_CLASS_HOT_PLUG] = "hot-plug-events" , |
230 | [EVENT_CLASS_IO] = "ibm,io-events" , |
231 | }; |
232 | |
233 | struct SpaprEventSource { |
234 | int irq; |
235 | uint32_t mask; |
236 | bool enabled; |
237 | }; |
238 | |
239 | static SpaprEventSource *spapr_event_sources_new(void) |
240 | { |
241 | return g_new0(SpaprEventSource, EVENT_CLASS_MAX); |
242 | } |
243 | |
244 | static void spapr_event_sources_register(SpaprEventSource *event_sources, |
245 | EventClassIndex index, int irq) |
246 | { |
247 | /* we only support 1 irq per event class at the moment */ |
248 | g_assert(event_sources); |
249 | g_assert(!event_sources[index].enabled); |
250 | event_sources[index].irq = irq; |
251 | event_sources[index].mask = EVENT_CLASS_MASK(index); |
252 | event_sources[index].enabled = true; |
253 | } |
254 | |
255 | static const SpaprEventSource * |
256 | spapr_event_sources_get_source(SpaprEventSource *event_sources, |
257 | EventClassIndex index) |
258 | { |
259 | g_assert(index < EVENT_CLASS_MAX); |
260 | g_assert(event_sources); |
261 | |
262 | return &event_sources[index]; |
263 | } |
264 | |
265 | void spapr_dt_events(SpaprMachineState *spapr, void *fdt) |
266 | { |
267 | uint32_t irq_ranges[EVENT_CLASS_MAX * 2]; |
268 | int i, count = 0, event_sources; |
269 | SpaprEventSource *events = spapr->event_sources; |
270 | |
271 | g_assert(events); |
272 | |
273 | _FDT(event_sources = fdt_add_subnode(fdt, 0, "event-sources" )); |
274 | |
275 | for (i = 0, count = 0; i < EVENT_CLASS_MAX; i++) { |
276 | int node_offset; |
277 | uint32_t interrupts[2]; |
278 | const SpaprEventSource *source = |
279 | spapr_event_sources_get_source(events, i); |
280 | const char *source_name = event_names[i]; |
281 | |
282 | if (!source->enabled) { |
283 | continue; |
284 | } |
285 | |
286 | spapr_dt_irq(interrupts, source->irq, false); |
287 | |
288 | _FDT(node_offset = fdt_add_subnode(fdt, event_sources, source_name)); |
289 | _FDT(fdt_setprop(fdt, node_offset, "interrupts" , interrupts, |
290 | sizeof(interrupts))); |
291 | |
292 | irq_ranges[count++] = interrupts[0]; |
293 | irq_ranges[count++] = cpu_to_be32(1); |
294 | } |
295 | |
296 | _FDT((fdt_setprop(fdt, event_sources, "interrupt-controller" , NULL, 0))); |
297 | _FDT((fdt_setprop_cell(fdt, event_sources, "#interrupt-cells" , 2))); |
298 | _FDT((fdt_setprop(fdt, event_sources, "interrupt-ranges" , |
299 | irq_ranges, count * sizeof(uint32_t)))); |
300 | } |
301 | |
302 | static const SpaprEventSource * |
303 | rtas_event_log_to_source(SpaprMachineState *spapr, int log_type) |
304 | { |
305 | const SpaprEventSource *source; |
306 | |
307 | g_assert(spapr->event_sources); |
308 | |
309 | switch (log_type) { |
310 | case RTAS_LOG_TYPE_HOTPLUG: |
311 | source = spapr_event_sources_get_source(spapr->event_sources, |
312 | EVENT_CLASS_HOT_PLUG); |
313 | if (spapr_ovec_test(spapr->ov5_cas, OV5_HP_EVT)) { |
314 | g_assert(source->enabled); |
315 | break; |
316 | } |
317 | /* fall through back to epow for legacy hotplug interrupt source */ |
318 | case RTAS_LOG_TYPE_EPOW: |
319 | source = spapr_event_sources_get_source(spapr->event_sources, |
320 | EVENT_CLASS_EPOW); |
321 | break; |
322 | default: |
323 | source = NULL; |
324 | } |
325 | |
326 | return source; |
327 | } |
328 | |
329 | static int rtas_event_log_to_irq(SpaprMachineState *spapr, int log_type) |
330 | { |
331 | const SpaprEventSource *source; |
332 | |
333 | source = rtas_event_log_to_source(spapr, log_type); |
334 | g_assert(source); |
335 | g_assert(source->enabled); |
336 | |
337 | return source->irq; |
338 | } |
339 | |
340 | static uint32_t spapr_event_log_entry_type(SpaprEventLogEntry *entry) |
341 | { |
342 | return entry->summary & RTAS_LOG_TYPE_MASK; |
343 | } |
344 | |
345 | static void rtas_event_log_queue(SpaprMachineState *spapr, |
346 | SpaprEventLogEntry *entry) |
347 | { |
348 | QTAILQ_INSERT_TAIL(&spapr->pending_events, entry, next); |
349 | } |
350 | |
351 | static SpaprEventLogEntry *rtas_event_log_dequeue(SpaprMachineState *spapr, |
352 | uint32_t event_mask) |
353 | { |
354 | SpaprEventLogEntry *entry = NULL; |
355 | |
356 | QTAILQ_FOREACH(entry, &spapr->pending_events, next) { |
357 | const SpaprEventSource *source = |
358 | rtas_event_log_to_source(spapr, |
359 | spapr_event_log_entry_type(entry)); |
360 | |
361 | if (source->mask & event_mask) { |
362 | break; |
363 | } |
364 | } |
365 | |
366 | if (entry) { |
367 | QTAILQ_REMOVE(&spapr->pending_events, entry, next); |
368 | } |
369 | |
370 | return entry; |
371 | } |
372 | |
373 | static bool rtas_event_log_contains(uint32_t event_mask) |
374 | { |
375 | SpaprMachineState *spapr = SPAPR_MACHINE(qdev_get_machine()); |
376 | SpaprEventLogEntry *entry = NULL; |
377 | |
378 | QTAILQ_FOREACH(entry, &spapr->pending_events, next) { |
379 | const SpaprEventSource *source = |
380 | rtas_event_log_to_source(spapr, |
381 | spapr_event_log_entry_type(entry)); |
382 | |
383 | if (source->mask & event_mask) { |
384 | return true; |
385 | } |
386 | } |
387 | |
388 | return false; |
389 | } |
390 | |
391 | static uint32_t next_plid; |
392 | |
393 | static void spapr_init_v6hdr(struct rtas_event_log_v6 *v6hdr) |
394 | { |
395 | v6hdr->b0 = RTAS_LOG_V6_B0_VALID | RTAS_LOG_V6_B0_NEW_LOG |
396 | | RTAS_LOG_V6_B0_BIGENDIAN; |
397 | v6hdr->b2 = RTAS_LOG_V6_B2_POWERPC_FORMAT |
398 | | RTAS_LOG_V6_B2_LOG_FORMAT_PLATFORM_EVENT; |
399 | v6hdr->company = cpu_to_be32(RTAS_LOG_V6_COMPANY_IBM); |
400 | } |
401 | |
402 | static void spapr_init_maina(struct rtas_event_log_v6_maina *maina, |
403 | int section_count) |
404 | { |
405 | SpaprMachineState *spapr = SPAPR_MACHINE(qdev_get_machine()); |
406 | struct tm tm; |
407 | int year; |
408 | |
409 | maina->hdr.section_id = cpu_to_be16(RTAS_LOG_V6_SECTION_ID_MAINA); |
410 | maina->hdr.section_length = cpu_to_be16(sizeof(*maina)); |
411 | /* FIXME: section version, subtype and creator id? */ |
412 | spapr_rtc_read(&spapr->rtc, &tm, NULL); |
413 | year = tm.tm_year + 1900; |
414 | maina->creation_date = cpu_to_be32((to_bcd(year / 100) << 24) |
415 | | (to_bcd(year % 100) << 16) |
416 | | (to_bcd(tm.tm_mon + 1) << 8) |
417 | | to_bcd(tm.tm_mday)); |
418 | maina->creation_time = cpu_to_be32((to_bcd(tm.tm_hour) << 24) |
419 | | (to_bcd(tm.tm_min) << 16) |
420 | | (to_bcd(tm.tm_sec) << 8)); |
421 | maina->creator_id = 'H'; /* Hypervisor */ |
422 | maina->section_count = section_count; |
423 | maina->plid = next_plid++; |
424 | } |
425 | |
426 | static void spapr_powerdown_req(Notifier *n, void *opaque) |
427 | { |
428 | SpaprMachineState *spapr = SPAPR_MACHINE(qdev_get_machine()); |
429 | SpaprEventLogEntry *entry; |
430 | struct rtas_event_log_v6 *v6hdr; |
431 | struct rtas_event_log_v6_maina *maina; |
432 | struct rtas_event_log_v6_mainb *mainb; |
433 | struct rtas_event_log_v6_epow *epow; |
434 | struct epow_extended_log *new_epow; |
435 | |
436 | entry = g_new(SpaprEventLogEntry, 1); |
437 | new_epow = g_malloc0(sizeof(*new_epow)); |
438 | entry->extended_log = new_epow; |
439 | |
440 | v6hdr = &new_epow->v6hdr; |
441 | maina = &new_epow->maina; |
442 | mainb = &new_epow->mainb; |
443 | epow = &new_epow->epow; |
444 | |
445 | entry->summary = RTAS_LOG_VERSION_6 |
446 | | RTAS_LOG_SEVERITY_EVENT |
447 | | RTAS_LOG_DISPOSITION_NOT_RECOVERED |
448 | | RTAS_LOG_OPTIONAL_PART_PRESENT |
449 | | RTAS_LOG_TYPE_EPOW; |
450 | entry->extended_length = sizeof(*new_epow); |
451 | |
452 | spapr_init_v6hdr(v6hdr); |
453 | spapr_init_maina(maina, 3 /* Main-A, Main-B and EPOW */); |
454 | |
455 | mainb->hdr.section_id = cpu_to_be16(RTAS_LOG_V6_SECTION_ID_MAINB); |
456 | mainb->hdr.section_length = cpu_to_be16(sizeof(*mainb)); |
457 | /* FIXME: section version, subtype and creator id? */ |
458 | mainb->subsystem_id = 0xa0; /* External environment */ |
459 | mainb->event_severity = 0x00; /* Informational / non-error */ |
460 | mainb->event_subtype = 0xd0; /* Normal shutdown */ |
461 | |
462 | epow->hdr.section_id = cpu_to_be16(RTAS_LOG_V6_SECTION_ID_EPOW); |
463 | epow->hdr.section_length = cpu_to_be16(sizeof(*epow)); |
464 | epow->hdr.section_version = 2; /* includes extended modifier */ |
465 | /* FIXME: section subtype and creator id? */ |
466 | epow->sensor_value = RTAS_LOG_V6_EPOW_ACTION_SYSTEM_SHUTDOWN; |
467 | epow->event_modifier = RTAS_LOG_V6_EPOW_MODIFIER_NORMAL; |
468 | epow->extended_modifier = RTAS_LOG_V6_EPOW_XMODIFIER_PARTITION_SPECIFIC; |
469 | |
470 | rtas_event_log_queue(spapr, entry); |
471 | |
472 | qemu_irq_pulse(spapr_qirq(spapr, |
473 | rtas_event_log_to_irq(spapr, RTAS_LOG_TYPE_EPOW))); |
474 | } |
475 | |
476 | static void spapr_hotplug_req_event(uint8_t hp_id, uint8_t hp_action, |
477 | SpaprDrcType drc_type, |
478 | union drc_identifier *drc_id) |
479 | { |
480 | SpaprMachineState *spapr = SPAPR_MACHINE(qdev_get_machine()); |
481 | SpaprEventLogEntry *entry; |
482 | struct hp_extended_log *new_hp; |
483 | struct rtas_event_log_v6 *v6hdr; |
484 | struct rtas_event_log_v6_maina *maina; |
485 | struct rtas_event_log_v6_mainb *mainb; |
486 | struct rtas_event_log_v6_hp *hp; |
487 | |
488 | entry = g_new(SpaprEventLogEntry, 1); |
489 | new_hp = g_malloc0(sizeof(struct hp_extended_log)); |
490 | entry->extended_log = new_hp; |
491 | |
492 | v6hdr = &new_hp->v6hdr; |
493 | maina = &new_hp->maina; |
494 | mainb = &new_hp->mainb; |
495 | hp = &new_hp->hp; |
496 | |
497 | entry->summary = RTAS_LOG_VERSION_6 |
498 | | RTAS_LOG_SEVERITY_EVENT |
499 | | RTAS_LOG_DISPOSITION_NOT_RECOVERED |
500 | | RTAS_LOG_OPTIONAL_PART_PRESENT |
501 | | RTAS_LOG_INITIATOR_HOTPLUG |
502 | | RTAS_LOG_TYPE_HOTPLUG; |
503 | entry->extended_length = sizeof(*new_hp); |
504 | |
505 | spapr_init_v6hdr(v6hdr); |
506 | spapr_init_maina(maina, 3 /* Main-A, Main-B, HP */); |
507 | |
508 | mainb->hdr.section_id = cpu_to_be16(RTAS_LOG_V6_SECTION_ID_MAINB); |
509 | mainb->hdr.section_length = cpu_to_be16(sizeof(*mainb)); |
510 | mainb->subsystem_id = 0x80; /* External environment */ |
511 | mainb->event_severity = 0x00; /* Informational / non-error */ |
512 | mainb->event_subtype = 0x00; /* Normal shutdown */ |
513 | |
514 | hp->hdr.section_id = cpu_to_be16(RTAS_LOG_V6_SECTION_ID_HOTPLUG); |
515 | hp->hdr.section_length = cpu_to_be16(sizeof(*hp)); |
516 | hp->hdr.section_version = 1; /* includes extended modifier */ |
517 | hp->hotplug_action = hp_action; |
518 | hp->hotplug_identifier = hp_id; |
519 | |
520 | switch (drc_type) { |
521 | case SPAPR_DR_CONNECTOR_TYPE_PCI: |
522 | hp->hotplug_type = RTAS_LOG_V6_HP_TYPE_PCI; |
523 | break; |
524 | case SPAPR_DR_CONNECTOR_TYPE_LMB: |
525 | hp->hotplug_type = RTAS_LOG_V6_HP_TYPE_MEMORY; |
526 | break; |
527 | case SPAPR_DR_CONNECTOR_TYPE_CPU: |
528 | hp->hotplug_type = RTAS_LOG_V6_HP_TYPE_CPU; |
529 | break; |
530 | case SPAPR_DR_CONNECTOR_TYPE_PHB: |
531 | hp->hotplug_type = RTAS_LOG_V6_HP_TYPE_PHB; |
532 | break; |
533 | default: |
534 | /* we shouldn't be signaling hotplug events for resources |
535 | * that don't support them |
536 | */ |
537 | g_assert(false); |
538 | return; |
539 | } |
540 | |
541 | if (hp_id == RTAS_LOG_V6_HP_ID_DRC_COUNT) { |
542 | hp->drc_id.count = cpu_to_be32(drc_id->count); |
543 | } else if (hp_id == RTAS_LOG_V6_HP_ID_DRC_INDEX) { |
544 | hp->drc_id.index = cpu_to_be32(drc_id->index); |
545 | } else if (hp_id == RTAS_LOG_V6_HP_ID_DRC_COUNT_INDEXED) { |
546 | /* we should not be using count_indexed value unless the guest |
547 | * supports dedicated hotplug event source |
548 | */ |
549 | g_assert(spapr_ovec_test(spapr->ov5_cas, OV5_HP_EVT)); |
550 | hp->drc_id.count_indexed.count = |
551 | cpu_to_be32(drc_id->count_indexed.count); |
552 | hp->drc_id.count_indexed.index = |
553 | cpu_to_be32(drc_id->count_indexed.index); |
554 | } |
555 | |
556 | rtas_event_log_queue(spapr, entry); |
557 | |
558 | qemu_irq_pulse(spapr_qirq(spapr, |
559 | rtas_event_log_to_irq(spapr, RTAS_LOG_TYPE_HOTPLUG))); |
560 | } |
561 | |
562 | void spapr_hotplug_req_add_by_index(SpaprDrc *drc) |
563 | { |
564 | SpaprDrcType drc_type = spapr_drc_type(drc); |
565 | union drc_identifier drc_id; |
566 | |
567 | drc_id.index = spapr_drc_index(drc); |
568 | spapr_hotplug_req_event(RTAS_LOG_V6_HP_ID_DRC_INDEX, |
569 | RTAS_LOG_V6_HP_ACTION_ADD, drc_type, &drc_id); |
570 | } |
571 | |
572 | void spapr_hotplug_req_remove_by_index(SpaprDrc *drc) |
573 | { |
574 | SpaprDrcType drc_type = spapr_drc_type(drc); |
575 | union drc_identifier drc_id; |
576 | |
577 | drc_id.index = spapr_drc_index(drc); |
578 | spapr_hotplug_req_event(RTAS_LOG_V6_HP_ID_DRC_INDEX, |
579 | RTAS_LOG_V6_HP_ACTION_REMOVE, drc_type, &drc_id); |
580 | } |
581 | |
582 | void spapr_hotplug_req_add_by_count(SpaprDrcType drc_type, |
583 | uint32_t count) |
584 | { |
585 | union drc_identifier drc_id; |
586 | |
587 | drc_id.count = count; |
588 | spapr_hotplug_req_event(RTAS_LOG_V6_HP_ID_DRC_COUNT, |
589 | RTAS_LOG_V6_HP_ACTION_ADD, drc_type, &drc_id); |
590 | } |
591 | |
592 | void spapr_hotplug_req_remove_by_count(SpaprDrcType drc_type, |
593 | uint32_t count) |
594 | { |
595 | union drc_identifier drc_id; |
596 | |
597 | drc_id.count = count; |
598 | spapr_hotplug_req_event(RTAS_LOG_V6_HP_ID_DRC_COUNT, |
599 | RTAS_LOG_V6_HP_ACTION_REMOVE, drc_type, &drc_id); |
600 | } |
601 | |
602 | void spapr_hotplug_req_add_by_count_indexed(SpaprDrcType drc_type, |
603 | uint32_t count, uint32_t index) |
604 | { |
605 | union drc_identifier drc_id; |
606 | |
607 | drc_id.count_indexed.count = count; |
608 | drc_id.count_indexed.index = index; |
609 | spapr_hotplug_req_event(RTAS_LOG_V6_HP_ID_DRC_COUNT_INDEXED, |
610 | RTAS_LOG_V6_HP_ACTION_ADD, drc_type, &drc_id); |
611 | } |
612 | |
613 | void spapr_hotplug_req_remove_by_count_indexed(SpaprDrcType drc_type, |
614 | uint32_t count, uint32_t index) |
615 | { |
616 | union drc_identifier drc_id; |
617 | |
618 | drc_id.count_indexed.count = count; |
619 | drc_id.count_indexed.index = index; |
620 | spapr_hotplug_req_event(RTAS_LOG_V6_HP_ID_DRC_COUNT_INDEXED, |
621 | RTAS_LOG_V6_HP_ACTION_REMOVE, drc_type, &drc_id); |
622 | } |
623 | |
624 | static void check_exception(PowerPCCPU *cpu, SpaprMachineState *spapr, |
625 | uint32_t token, uint32_t nargs, |
626 | target_ulong args, |
627 | uint32_t nret, target_ulong rets) |
628 | { |
629 | uint32_t mask, buf, len, event_len; |
630 | uint64_t xinfo; |
631 | SpaprEventLogEntry *event; |
632 | struct rtas_error_log ; |
633 | int i; |
634 | |
635 | if ((nargs < 6) || (nargs > 7) || nret != 1) { |
636 | rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); |
637 | return; |
638 | } |
639 | |
640 | xinfo = rtas_ld(args, 1); |
641 | mask = rtas_ld(args, 2); |
642 | buf = rtas_ld(args, 4); |
643 | len = rtas_ld(args, 5); |
644 | if (nargs == 7) { |
645 | xinfo |= (uint64_t)rtas_ld(args, 6) << 32; |
646 | } |
647 | |
648 | event = rtas_event_log_dequeue(spapr, mask); |
649 | if (!event) { |
650 | goto out_no_events; |
651 | } |
652 | |
653 | event_len = event->extended_length + sizeof(header); |
654 | |
655 | if (event_len < len) { |
656 | len = event_len; |
657 | } |
658 | |
659 | header.summary = cpu_to_be32(event->summary); |
660 | header.extended_length = cpu_to_be32(event->extended_length); |
661 | cpu_physical_memory_write(buf, &header, sizeof(header)); |
662 | cpu_physical_memory_write(buf + sizeof(header), event->extended_log, |
663 | event->extended_length); |
664 | rtas_st(rets, 0, RTAS_OUT_SUCCESS); |
665 | g_free(event->extended_log); |
666 | g_free(event); |
667 | |
668 | /* according to PAPR+, the IRQ must be left asserted, or re-asserted, if |
669 | * there are still pending events to be fetched via check-exception. We |
670 | * do the latter here, since our code relies on edge-triggered |
671 | * interrupts. |
672 | */ |
673 | for (i = 0; i < EVENT_CLASS_MAX; i++) { |
674 | if (rtas_event_log_contains(EVENT_CLASS_MASK(i))) { |
675 | const SpaprEventSource *source = |
676 | spapr_event_sources_get_source(spapr->event_sources, i); |
677 | |
678 | g_assert(source->enabled); |
679 | qemu_irq_pulse(spapr_qirq(spapr, source->irq)); |
680 | } |
681 | } |
682 | |
683 | return; |
684 | |
685 | out_no_events: |
686 | rtas_st(rets, 0, RTAS_OUT_NO_ERRORS_FOUND); |
687 | } |
688 | |
689 | static void event_scan(PowerPCCPU *cpu, SpaprMachineState *spapr, |
690 | uint32_t token, uint32_t nargs, |
691 | target_ulong args, |
692 | uint32_t nret, target_ulong rets) |
693 | { |
694 | if (nargs != 4 || nret != 1) { |
695 | rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); |
696 | return; |
697 | } |
698 | rtas_st(rets, 0, RTAS_OUT_NO_ERRORS_FOUND); |
699 | } |
700 | |
701 | void spapr_clear_pending_events(SpaprMachineState *spapr) |
702 | { |
703 | SpaprEventLogEntry *entry = NULL, *next_entry; |
704 | |
705 | QTAILQ_FOREACH_SAFE(entry, &spapr->pending_events, next, next_entry) { |
706 | QTAILQ_REMOVE(&spapr->pending_events, entry, next); |
707 | g_free(entry->extended_log); |
708 | g_free(entry); |
709 | } |
710 | } |
711 | |
712 | void spapr_events_init(SpaprMachineState *spapr) |
713 | { |
714 | int epow_irq = SPAPR_IRQ_EPOW; |
715 | |
716 | if (SPAPR_MACHINE_GET_CLASS(spapr)->legacy_irq_allocation) { |
717 | epow_irq = spapr_irq_findone(spapr, &error_fatal); |
718 | } |
719 | |
720 | spapr_irq_claim(spapr, epow_irq, false, &error_fatal); |
721 | |
722 | QTAILQ_INIT(&spapr->pending_events); |
723 | |
724 | spapr->event_sources = spapr_event_sources_new(); |
725 | |
726 | spapr_event_sources_register(spapr->event_sources, EVENT_CLASS_EPOW, |
727 | epow_irq); |
728 | |
729 | /* NOTE: if machine supports modern/dedicated hotplug event source, |
730 | * we add it to the device-tree unconditionally. This means we may |
731 | * have cases where the source is enabled in QEMU, but unused by the |
732 | * guest because it does not support modern hotplug events, so we |
733 | * take care to rely on checking for negotiation of OV5_HP_EVT option |
734 | * before attempting to use it to signal events, rather than simply |
735 | * checking that it's enabled. |
736 | */ |
737 | if (spapr->use_hotplug_event_source) { |
738 | int hp_irq = SPAPR_IRQ_HOTPLUG; |
739 | |
740 | if (SPAPR_MACHINE_GET_CLASS(spapr)->legacy_irq_allocation) { |
741 | hp_irq = spapr_irq_findone(spapr, &error_fatal); |
742 | } |
743 | |
744 | spapr_irq_claim(spapr, hp_irq, false, &error_fatal); |
745 | |
746 | spapr_event_sources_register(spapr->event_sources, EVENT_CLASS_HOT_PLUG, |
747 | hp_irq); |
748 | } |
749 | |
750 | spapr->epow_notifier.notify = spapr_powerdown_req; |
751 | qemu_register_powerdown_notifier(&spapr->epow_notifier); |
752 | spapr_rtas_register(RTAS_CHECK_EXCEPTION, "check-exception" , |
753 | check_exception); |
754 | spapr_rtas_register(RTAS_EVENT_SCAN, "event-scan" , event_scan); |
755 | } |
756 | |