1 | /* |
2 | * Copyright (c) 2018, Red Hat, Inc. All rights reserved. |
3 | * |
4 | * This code is free software; you can redistribute it and/or modify it |
5 | * under the terms of the GNU General Public License version 2 only, as |
6 | * published by the Free Software Foundation. |
7 | * |
8 | * This code is distributed in the hope that it will be useful, but WITHOUT |
9 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
10 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
11 | * version 2 for more details (a copy is included in the LICENSE file that |
12 | * accompanied this code). |
13 | * |
14 | * You should have received a copy of the GNU General Public License version |
15 | * 2 along with this work; if not, write to the Free Software Foundation, |
16 | * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. |
17 | * |
18 | * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
19 | * or visit www.oracle.com if you need additional information or have any |
20 | * questions. |
21 | * |
22 | */ |
23 | |
24 | #ifndef CPU_X86_GC_SHENANDOAH_SHENANDOAHBARRIERSETASSEMBLER_X86_HPP |
25 | #define CPU_X86_GC_SHENANDOAH_SHENANDOAHBARRIERSETASSEMBLER_X86_HPP |
26 | |
27 | #include "asm/macroAssembler.hpp" |
28 | #include "gc/shared/barrierSetAssembler.hpp" |
29 | #ifdef COMPILER1 |
30 | class LIR_Assembler; |
31 | class ShenandoahPreBarrierStub; |
32 | class ShenandoahLoadReferenceBarrierStub; |
33 | class StubAssembler; |
34 | #endif |
35 | class StubCodeGenerator; |
36 | |
37 | class ShenandoahBarrierSetAssembler: public BarrierSetAssembler { |
38 | private: |
39 | |
40 | static address _shenandoah_lrb; |
41 | |
42 | void satb_write_barrier_pre(MacroAssembler* masm, |
43 | Register obj, |
44 | Register pre_val, |
45 | Register thread, |
46 | Register tmp, |
47 | bool tosca_live, |
48 | bool expand_call); |
49 | |
50 | void shenandoah_write_barrier_pre(MacroAssembler* masm, |
51 | Register obj, |
52 | Register pre_val, |
53 | Register thread, |
54 | Register tmp, |
55 | bool tosca_live, |
56 | bool expand_call); |
57 | |
58 | void resolve_forward_pointer(MacroAssembler* masm, Register dst, Register tmp = noreg); |
59 | void resolve_forward_pointer_not_null(MacroAssembler* masm, Register dst, Register tmp = noreg); |
60 | |
61 | void load_reference_barrier_not_null(MacroAssembler* masm, Register dst); |
62 | |
63 | void storeval_barrier_impl(MacroAssembler* masm, Register dst, Register tmp); |
64 | |
65 | address generate_shenandoah_lrb(StubCodeGenerator* cgen); |
66 | |
67 | void save_vector_registers(MacroAssembler* masm); |
68 | void restore_vector_registers(MacroAssembler* masm); |
69 | |
70 | public: |
71 | static address shenandoah_lrb(); |
72 | |
73 | void storeval_barrier(MacroAssembler* masm, Register dst, Register tmp); |
74 | #ifdef COMPILER1 |
75 | void gen_pre_barrier_stub(LIR_Assembler* ce, ShenandoahPreBarrierStub* stub); |
76 | void gen_load_reference_barrier_stub(LIR_Assembler* ce, ShenandoahLoadReferenceBarrierStub* stub); |
77 | void generate_c1_pre_barrier_runtime_stub(StubAssembler* sasm); |
78 | #endif |
79 | |
80 | void load_reference_barrier(MacroAssembler* masm, Register dst); |
81 | |
82 | void cmpxchg_oop(MacroAssembler* masm, |
83 | Register res, Address addr, Register oldval, Register newval, |
84 | bool exchange, Register tmp1, Register tmp2); |
85 | virtual void arraycopy_prologue(MacroAssembler* masm, DecoratorSet decorators, BasicType type, |
86 | Register src, Register dst, Register count); |
87 | virtual void arraycopy_epilogue(MacroAssembler* masm, DecoratorSet decorators, BasicType type, |
88 | Register src, Register dst, Register count); |
89 | virtual void load_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type, |
90 | Register dst, Address src, Register tmp1, Register tmp_thread); |
91 | virtual void store_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type, |
92 | Address dst, Register val, Register tmp1, Register tmp2); |
93 | |
94 | virtual void barrier_stubs_init(); |
95 | |
96 | }; |
97 | |
98 | #endif // CPU_X86_GC_SHENANDOAH_SHENANDOAHBARRIERSETASSEMBLER_X86_HPP |
99 | |